Predicting failure parameters of semiconductor devices subjected to stress conditions

Patent metadata

Field	Value
Publication number	US-11493548-B2
Application number	US-202117383776-A
Country	US
Kind code	B2
Filing date	Jul 23, 2021
Priority date	Aug 31, 2020
Publication date	Nov 8, 2022
Grant date	Nov 8, 2022

Abstract

A method for predicting failure parameters of semiconductor devices can include receiving a set of data that includes (i) characteristics of a sample semiconductor device, and (ii) parameters characterizing a stress condition. The method further includes extracting a plurality of feature values from the set of data and inputting the plurality of feature values into a trained model executing on the one or more processors, wherein the trained model is configured according to an artificial intelligence (AI) algorithm based on a previous plurality of feature values, and wherein the trained model is operable to output a failure prediction based on the plurality of feature values. Further, the method includes generating, via the trained model, a predicted failure parameter of the sample semiconductor device due to the stress condition.

First claim

What is claimed is:

1. A method for training a model to predict failure parameters of semiconductor devices, the method comprising:
receiving, at one or more processors, a first set of data comprising:
(i) first characteristics of one or more first semiconductor devices;
(ii) first measurements of the one or more first semiconductor devices captured while each of the one or more first semiconductor devices is subjected to one or more first stress conditions; and
(iii) first parameters characterizing the one or more first stress conditions;

generating, by the one or more processors, a first artificial intelligence (AI) training set based on the first set of data and on corresponding first failure parameters of the one or more first semiconductor devices due to the one or more first stress conditions, wherein at least one attribute of the corresponding first failure parameters is defined as a label of the first AI training set, and wherein one or more attributes of the first set of data are defined as feature values of the first AI training set;
training, by the one or more processors, a first iteration of a trained model with the first Al training set, the first iteration of the trained model operable to provide a first set of failure predictions having corresponding first error rates;
receiving, at the one or more processors, a second set of data comprising:
(i) second characteristics of one or more second semiconductor devices;
(ii) second measurements of the one or more second semiconductor devices captured while each of the one or more second semiconductor devices is subjected to one or more second stress conditions; and
(iii) second parameters characterizing the one or more second stress conditions;

generating, by the one or more processors, a second AI training set based on the second set of data and on corresponding second failure parameters of the one or more second semiconductor devices due to the one or more second stress conditions, wherein at least one attribute of the corresponding second failure parameters is defined as a label of the second AI training set, and wherein one or more attributes of the second set of data are defined as feature values of the second AI training set; and
training, by the one or more processors, a second iteration of the trained model with the second AI training set, the second iteration of the trained model operable to provide a second set of failure predictions having corresponding second error rates, wherein the second error rates have a reduced overall error rate compared to an overall error rate of the first error rates.

2. A method according to claim 1 , wherein:
the first failure parameters include first failure rates of the one or more first semiconductor devices; and
the second failure parameters include second failure rates of the one or more second semiconductor devices.

3. A method according to claim 1 , wherein:
the first failure parameters include first times to failure of the one or more first semiconductor devices; and
the second failure parameters include second times to failure of the one or more second semiconductor devices.

4. A method according to claim 1 , wherein:
the first failure parameters include first indications of defect formation within the one or more first semiconductor devices; and
the second failure parameters include second indications of defect formation within the one or more second semiconductor devices.

5. A method according to claim 1 , wherein:
the first measurements of the one or more semiconductor devices include at least one of first current measurements or first voltage measurements of the one or more first semiconductor devices; and
the second measurements of the one or more semiconductor devices include at least one of second current measurements or second voltage measurements of the one or more second semiconductor devices.

6. A method according to claim 1 , wherein:
the first measurements of the one or more semiconductor devices include first x-ray images of the one or more first semiconductor devices; and
the second measurements of the one or more semiconductor devices include second x-ray images of the one or more second semiconductor devices.

7. A method according to claim 1 , wherein:
the first measurements of the one or more first semiconductor devices are captured at first points of failure of the one or more first semiconductor devices; and
the second measurements of the one or more second semiconductor devices are captured at second points of failure of the one or more second semiconductor devices.

8. A method according to claim 1 , wherein:
the first characteristics include first material types of the one or more first semiconductor devices; and
the second characteristics include second material types of the one or more second semiconductor devices.

9. A method according to claim 1 , wherein:
the first characteristics include at least one of first operating voltages, first voltage ratings, or first current ratings of the one or more first semiconductor devices; and
the second characteristics include second operating voltages, second voltage ratings, or second current ratings of the one or more second semiconductor devices.

10. A method according to claim 1 , wherein the one or more first stress conditions and the one or more second stress conditions include a temperature greater than 700° C.

11. A method according to claim 1 , wherein the one or more first stress conditions and the one or more second stress conditions include neutron radiation incident at a non-zero angle of incidence on at least one of the one or more first semiconductor devices and at least one of the one or more second semiconductor devices, respectively, wherein a neutron flux of the neutron radiation is greater than 10 5 neutrons/cm 2 /s.

12. A method according to claim 1 , wherein:
the one or more first stress conditions include at least one of a first voltage spike or a first current spike applied to at least one of the one or more first semiconductor devices; and
the one or more second stress conditions include at least one of a second voltage spike or a second current spike applied to at least one of the one or more second semiconductor devices.

13. A method for predicting failure parameters of semiconductor devices, the method comprising:
receiving, at one or more processors, a set of data comprising:
(i) characteristics of a sample semiconductor device; and
(ii) parameters characterizing a stress condition;

extracting, by the one or more processors, a plurality of feature values from the set of data, the plurality of feature values including one or more feature values of the characteristics of the sample semiconductor device and one or more feature values of the parameters characterizing the stress condition;
inputting, by the one or more processors, the plurality of feature values into a trained model executing on the one or more processors, wherein the trained model is configured according to an artificial intelligence (AI) algorithm based on a previous plurality of feature values, and wherein the trained model is operable to output a failure prediction based on the plurality of feature values; and
generating, by the one or more processors via the trained model, a predicted failure parameter of the sample semiconductor device due to the stress condition.

14. A method according to claim 13 , wherein generating the predicted failure parameter includes generating at least one of a predicted failure rate of the sample semiconductor device, a predicted time to failure of the sample semiconductor device, or a pr

Assignees

• Uchicago Argonne Llc

Inventors

• Ahmed Moinuddin
• Hryn John N
• Stankus Christopher

Classifications

• G01R31/2642 Primary

  Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests · CPC title

• G01R31/2848

  using simulation · CPC title

• G01R31/2879

  related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads · CPC title

• G01R31/275

  for testing individual semiconductor components within integrated circuits · CPC title

• G01R31/2874

  related to temperature · CPC title