Display device and display panel

Patent metadata

Field	Value
Publication number	US-11488539-B2
Application number	US-202117245979-A
Country	US
Kind code	B2
Filing date	Apr 30, 2021
Priority date	Oct 11, 2018
Publication date	Nov 1, 2022
Grant date	Nov 1, 2022

Abstract

A display device can include a display panel including a plurality of data lines, a plurality of scan lines, a plurality of light emission control lines, and a plurality of sub-pixels; a first driving circuit configured to drive the plurality of data lines; a second driving circuit configured to drive the plurality of scan lines; and a third driving circuit configured to drive the plurality of light emission control lines, in which the display panel includes an active area in which an image is displayed and a non-active area which is an edge area of the active area.

First claim

What is claimed is:

1. A display device, comprising:
a plurality of sub-pixels defined by a plurality of data lines and a plurality of scan lines, each of the plurality of sub-pixels including a light emitting device, a driving transistor, a scan transistor, and a storage capacitor, wherein the light emitting device includes a first electrode, a light emitting layer, and a second electrode;
a pad electrically connected to a first driving circuit, the pad being disposed in a non-active area, the non-active area being an edge area of an active area in which an image is displayed; and
a data control transistor disposed between the pad and a corresponding data line among the plurality of data lines, the data control transistor being configured to connect and disconnect the corresponding data line with the first driving circuit based on a sampling signal.

2. The display device of claim 1 , wherein, during a first period, a reference voltage is provided to a first plate and a second plate of the storage capacitor, the data control transistor is turned off, and the second plate and the first driving circuit are electrically disconnected from each other, and
wherein, during a second period after the first period, as the data control transistor is turned on, the second plate and the first driving circuit are electrically connected to each other.

3. The display device of claim 1 , wherein the plurality of sub-pixels includes a first sub-pixel and a second sub-pixel adjacent to each other,
each of the first sub-pixel and the second sub-pixel includes a light emission area, a circuit area, and a transparent area,
the transparent area does not overlap the light emission area and the circuit area,
a part or a whole of the light emission area overlaps with a part or a whole of the circuit area, and
the transparent area of the first sub-pixel and the transparent area of the second sub-pixel are integrated into one transparent area.

4. The display device of claim 3 , wherein the light emitting device, the driving transistor, the scan transistor, and the storage capacitor are disposed in the circuit area, and
at least one signal wiring in a row direction connected to the first sub-pixel and the second sub-pixel is disposed across or adjacent to the circuit area.

5. The display device of claim 3 , wherein the at least one signal wiring includes a first scan line among the plurality of scan lines, and
wherein the first scan line is commonly connected to a gate node of the scan transistor disposed in the circuit area of the first sub-pixel and a gate node of the scan transistor disposed in the circuit area of the second sub-pixel.

6. The display device of claim 3 , wherein a plurality of first signal wirings in a column direction connected to the first sub-pixel is disposed on opposite sides of a side adjacent to a boundary between the first sub-pixel and the second sub-pixel among both sides of the first sub-pixel, and
a plurality of second signal wirings in the column direction connected to the second sub-pixel is disposed on opposite sides of a side adjacent to a boundary between the first sub-pixel and the second sub-pixel among both sides of the second sub-pixel.

7. The display device of claim 6 , wherein a signal wiring in the column direction is not disposed between the first sub-pixel and the second sub-pixel.

8. The display device of claim 6 , wherein the plurality of first signal wirings include a first data line supplying a data voltage to the first sub-pixel among the plurality of data lines, and
the plurality of second signal wirings include a second data line supplying a data voltage to the second sub-pixel among the plurality of data lines.

9. The display device of claim 8 , wherein the plurality of first signal wirings include a first driving voltage line supplying a driving voltage to the first sub-pixel and a first reference voltage line supplying a reference voltage to the first sub-pixel, and
the plurality of second signal wirings include a second driving voltage line supplying the driving voltage to the second sub-pixel and a second reference voltage line supplying the reference voltage to the second sub-pixel.

10. The display device of claim 9 , wherein all or part of the first driving voltage line overlaps the first reference voltage line, and all or part of the second driving voltage line overlaps the second reference voltage line.

11. The display device of claim 9 , wherein a protrusion of the first reference voltage line crosses and overlaps the first data line, and a protrusion of the second reference voltage line crosses and overlaps the second data line.

12. The display device of claim 1 , wherein the storage capacitor includes a first plate and a second plate,
wherein the first plate is disposed in a same layer as the plurality of scan lines, and
wherein the second plate is disposed in a same layer as the plurality of data lines.

13. The display device of claim 1 , wherein in each of the plurality of sub-pixels, the light emitting device is electrically connected between a base voltage and a first node, the driving transistor is electrically connected between a driving voltage line and a second node, the storage capacitor is electrically connected between a third node and a fourth node, and the scan transistor include a first scan transistor, a first scan transistor, and a third scan transistor,
wherein each of the plurality of sub-pixels further includes a first light emission control transistor electrically connected between the first node and the second node, and a second light emission control transistor electrically connected between the fourth node and a reference voltage line,
wherein the first scan transistor is electrically connected between the fourth node and a corresponding data line among the plurality of data lines, the second scan transistor is electrically connected between the second node and the third node, and the third scan transistor is electrically connected between the first node and the reference voltage line, and
wherein a gate node of the first scan transistor, a gate node of the second scan transistor, and a gate node of the third scan transistor are electrically connected in common to a single scan line among the plurality of scan lines.

14. The display device of claim 13 , wherein the gate node of the first light emission control transistor and a gate node of the second light emission control transistor are electrically connected to one emission control line.

15. The display device of claim 1 , wherein the data control transistor is disposed in the non-active area of a display panel and electrically connected to the first driving circuit.

Assignees

• Lg Display Co Ltd

Inventors

• Park Jaehoon
• Kim Seonyeong

Classifications

• G09G2330/04

  Display protection · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G2310/0232

  Special driving of display border areas · CPC title

• G09G3/3291

  in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title