Test method for self-refresh frequency of memory array and memory array test device

Patent metadata

Field	Value
Publication number	US-11482297-B2
Application number	US-202117438431-A
Country	US
Kind code	B2
Filing date	Jun 8, 2021
Priority date	Aug 31, 2020
Publication date	Oct 25, 2022
Grant date	Oct 25, 2022

Abstract

Disclosed are a test method for self-refresh frequency of a memory array and a memory array test device. The test method includes: providing a memory array; determining a shortest duration for charge in memory cells of the memory array to leak off, and marking the shortest duration as a first duration; setting an auto-refresh cycle of the memory array according to the first duration, where the auto-refresh cycle is longer than the first duration; performing m tests, where an nth test includes sequentially performing the following: refresh position count resetting, writing preset data to the memory array, performing a self-refresh having a duration of Tn, performing an auto-refresh having a duration of one auto-refresh cycle, reading the memory array, and recording a read status, where Tn−1<Tn, and 2≤n≤m.

First claim

The invention claimed is:

1. A test method for self-refresh frequency of a memory array, comprising:
providing a memory array;
determining a shortest duration for charge in memory cells of the memory array to leak off, and marking the shortest duration as a first duration;
setting an auto-refresh cycle of the memory array according to the first duration, wherein the auto-refresh cycle is longer than the first duration;
performing m tests, wherein an n th test comprises sequentially performing the following: refresh position count resetting, writing preset data to the memory array, performing a self-refresh having a duration of T n , performing an auto-refresh having a duration of one auto-refresh cycle, reading the memory array, and recording a read status, wherein T n−1 <T n , and 2≤n≤m; and
determining the self-refresh frequency of the memory array according to m read statuses corresponding to the m tests.

2. The test method for self-refresh frequency of a memory array according to claim 1 , wherein the determining a shortest duration for charge in memory cells of the memory array to leak off comprises:
stopping a self-refresh function and an auto-refresh function of the memory array, and writing the preset data to the memory array;
reading the memory array a plurality of times, and determining, at the first time when a read result is not the preset data, a time difference between a time point at which the memory array is read this time and a time point at which the memory array is read last time; and
setting the time difference as the shortest duration.

3. The test method for self-refresh frequency of a memory array according to claim 2 , wherein the reading the memory array a plurality of times comprises: when a time point at which the memory array is read the k th time is t k , a difference between t k+1 −t k and t k −t k−1 is not greater than 0.01 seconds, wherein k is a positive integer, and k≥2.

4. The test method for self-refresh frequency of a memory array according to claim 1 , wherein the setting an auto-refresh cycle of the memory array according to the first duration comprises:
determining a ratio of the first duration to a number of refreshes in one auto-refresh cycle corresponding to the memory array, and marking the ratio as a second duration; and
setting the auto-refresh cycle to a sum of the first duration and the second duration.

5. The test method for self-refresh frequency of a memory array according to claim 1 , wherein the determining the self-refresh frequency of the memory array according to m read statuses corresponding to the m tests comprises:
determining a test with a read state being that the preset data fails to be read, and marking the test as an alternative test; and
determining a self-refresh cycle of the memory array according to self-refresh durations corresponding to a plurality of alternative tests.

6. The test method for self-refresh frequency of a memory array according to claim 5 , wherein the determining a self-refresh cycle of the memory array according to self-refresh durations corresponding to a plurality of alternative tests comprises:
obtaining the self-refresh durations corresponding to the plurality of alternative tests;
performing pairwise subtraction between the self-refresh durations corresponding to the plurality of alternative tests, to obtain a plurality of target differences; and
determining the self-refresh cycle of the memory array according to the plurality of target differences.

7. The test method for self-refresh frequency of a memory array according to claim 1 , wherein a difference between a self-refresh duration T n of a n th test and a self-refresh duration T n−1 of a (n−1) th test is a fixed value, and the difference is less than 1 μs.

8. The test method for self-refresh frequency of a memory array according to claim 1 , wherein the determining the self-refresh frequency of the memory array according to m read statuses corresponding to the m tests comprises:
determining a self-refresh cycle of the memory array according to the m read statuses corresponding to the m tests;
determining a number of refreshes in one refresh cycle of the memory array; and
determining the self-refresh frequency of the memory array according to a ratio of the number of refreshes in one refresh cycle of the memory array to the self-refresh cycle of the memory array.

9. The test method for self-refresh frequency of a memory array according to claim 4 , wherein the number of refreshes in one refresh cycle of the memory array is 8,192.

10. A memory array test device, comprising:
a memory; and
a processor, configured to execute code stored in the memory, to perform the test method for self-refresh frequency of a memory array according to claim 1 .

Assignees

• Changxin Memory Tech Inc

Inventors

• Lu Tianchen

Classifications

• G11C29/50012

  of timing · CPC title

• G11C29/44

  Indication or identification of errors, e.g. for repair · CPC title

• G11C11/40615 Primary

  Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs · CPC title

• G11C11/406 Primary

  Management or control of the refreshing or charge-regeneration cycles · CPC title

• G11C29/46 Primary

  Test trigger logic · CPC title