Configuration cache for the ARM SMMUv3

Patent metadata

Field	Value
Publication number	US-11474953-B2
Application number	US-201816158443-A
Country	US
Kind code	B2
Filing date	Oct 12, 2018
Priority date	Oct 12, 2018
Publication date	Oct 18, 2022
Grant date	Oct 18, 2022

Abstract

A method of translating a virtual address into a physical memory address in an ARM System Memory Management Unit version 3 (SMMUv3) system includes searching a Configuration Cache memory for a matching tag that matches an associated tag upon receiving the virtual address and the associated tag, and extracting, in a single memory lookup cycle, a matching data field associated with the matching tag when the matching tag is found in the Configuration Cache memory. A matching data field of the Configuration Cache memory includes a matching Stream Table Entry (STE) and a matching Context Descriptor (CD), both associated with the matching tag. The Configuration Cache memory may be configured as a content-addressable memory. The method further includes storing entries associated with a multiple memory lookup cycle virtual address-to-physical address translation into the Configuration Cache memory, each of the entries including a tag, an associated STE and an associated CD.

First claim

What is claimed is:

1. A method of translating a virtual address into a physical memory address in an ARM System Memory Management Unit Version 3 (SMMUv3) memory management system, comprising:
upon receiving the virtual address and an associated tag, searching a Configuration Cache memory for a matching tag that matches the associated tag with respect to at least one of (i) a valid field, (ii) a StreamlD (SID) field, (iii) a Substream-valid (SSV) field, and (iv) a SubstreamlD (SSID) field;
extracting, in a single memory lookup cycle, a matching data field associated with the matching tag when the matching tag is found in the Configuration Cache memory, the matching data field of the Configuration Cache memory comprising a matching Stream Table Entry (STE) and a matching Context Descriptor (CD), both associated with the matching tag;
the SMMUv3 memory management system is further configured to perform a multiple memory lookup cycle virtual address-to-physical address translation when the matching tag is not found in the Configuration Cache memory, and store a corresponding entry in the Configuration Cache memory; and
each tag in the Configuration Cache memory comprises the SID field, and wherein lowest significance bits of the SID field comprise at least one ternary bit.

2. The method of claim 1 , further comprising organizing the Configuration Cache memory as a content-addressable memory (CAM).

3. The method of claim 1 , further comprising storing one or more entries associated with the multiple memory lookup cycle virtual address-to-physical address translation into the Configuration Cache memory, each of the one or more entries comprising a tag, an associated STE and an associated CD.

4. The method of claim 3 , wherein each tag in the Configuration Cache memory comprises the valid field, the StreamID (SID) field, the Substream-valid (SSV) field, and the SubstreamlD (SSID) field, and interpreting 15 of the lowest significance bits of the SID field as ternary bits.

5. The method of claim 1 , further comprising performing a translation of the virtual address into the physical memory address utilizing the matching STE and the matching CD.

6. The method of claim 1 , further comprising a system memory management unit (SMMU) submitting a query tag, based on the associated tag, to the Configuration Cache memory for the searching.

7. The method of claim 1 , wherein the corresponding entry comprising (i) a translation tag comprising a translation valid field, a translation SID field, a translation SSV field, and a translation SSID field, and (ii) a translation data field comprising a translation STE and a translation CD.

8. The method of claim 1 , further comprising performing an STE invalidation operation by identifying entries having identical values in their respective SID fields and corresponding valid fields set to a value of 1 , and resetting the corresponding valid fields of the identified entries to a value of 0.

9. The method of claim 1 , further comprising performing a CD invalidation operation by identifying entries having identical values in respective SID fields, identical values in respective SSID fields, corresponding valid fields set to a value of 1, and corresponding SSV fields set to a value of 1, and resetting the corresponding valid fields of the identified entries to a value of 0.

10. The method of claim 9 , further comprising (i) when an entry to be stored in the Configuration Cache memory has the SSV field set to 0, storing the entry with the SSV field set to 0 and the SSID field set to 0, and (ii) while performing the CD invalidation operation, ignoring the corresponding SSV fields for entries with the respective SSID fields set to 0.

11. The method of claim 1 , wherein upon receiving the virtual address and the associated tag, searching the Configuration Cache memory for the matching tag that matches the associated tag with respect to (i) the valid field and (ii) the Substream-valid (SSV) field.

12. A system for translating a virtual address from a client device into a physical memory address for addressing a physical memory device, comprising:
a Configuration Cache memory;
a system memory management unit (SMMU) operatively coupled to the client device, the physical memory device, and the Configuration Cache memory, the SMMU configured to
upon receiving the virtual address and an associated tag, search the Configuration Cache memory for a matching tag with respect to at least one of (i) a valid field, (ii) a StreamID (SID) field, (iii) a Substream-valid (SSV) field, and (iv) a SubstreamiD (SSID) field;
extract, in a single memory lookup cycle, a data field associated with the matching tag when a matching tag is found in the Configuration Cache memory, each data field of the Configuration Cache memory comprising a Stream Table Entry (STE) and a context Descriptors (CD) associated with the matching tag; and
configure the SMMU to perform a multiple memory lookup cycle virtual address-to-physical address translation when the matching tag is not found in the Configuration Cache memory, and store a corresponding entry in the Configuration Cache memory;
each tag in the Configuration Cache memory comprises the SID field, and wherein lowest significance bits of the SID field comprise at least one ternary bit.

13. The system of claim 12 , wherein the SMMU is further configured to organize the Configuration Cache memory as a content-addressable memory (CAM).

14. The system of claim 12 , wherein the SMMU is further configured to store at least one entry associated with the multiple memory lookup cycle virtual address-to- physical address translation into the Configuration Cache memory, the at least one entry comprising a tag, an associated STE and an associated CD.

15. The system of claim 12 , wherein the SMMU is further configured to perform a translation of the virtual address into the physical memory address utilizing the STE and the CD associated with the matching tag.

16. The system of claim 12 , wherein the SMMU is further configured to submit a query tag, based on the associated tag, to the Configuration Cache memory for the search.

17. The system of claim 12 , wherein the corresponding entry comprises (i) a translation tag comprising a translation valid field, a translation SID field, a translation SSV field, and a translation SSID field, and (ii) a translation data field comprising a translation STE and a translation CD.

18. The system of claim 12 , wherein the SMMU is further configured to perform an STE invalidation operation by identifying entries having identical values in their respective SID fields and corresponding valid fields set to a value of 1, and resetting the corresponding valid fields of the identified entries to a value of 0.

19. The system of claim 12 , wherein the SMMU is further configured to perform a CD invalidation operation by identifying entries having identical values in respective SID fields, identical values in respective SSID fields, corresponding valid fields set to a value of 1, and corresponding SSV fields set to a value of 1, and resetting the corresponding valid fields of the identified entries to a value of 0.

20. The system of claim 12 , wherein the SMMU is further configured to (i) when an entry to be stored in the Configuration Cache memory has the SSV field set to 0, store the entry with the SSV field set to 0 and the SSID field set to 0, and (ii) while performing the CD invalidation operation, ignore the corresponding SSV fields for entries with respective SSID fields s

Assignees

• Marvell Asia Pte Ltd

Inventors

• Salvi Manan
• Ma Albert

Classifications

• G06F12/0871

  Allocation or management of cache space · CPC title

• G06F12/0868

  Data transfer between cache memory and other subsystems, e.g. storage devices or host systems · CPC title

• G06F12/1036 Primary

  for multiple virtual address spaces, e.g. segmentation (G06F12/1045 takes precedence) · CPC title

• G06F2212/1041

  Resource optimization · CPC title

• G06F12/1045 Primary

  associated with a data cache · CPC title