Semiconductor device having a porous metal oxide film and a semiconductor substrate with a connection electrically connected to the porous metal oxide film

Patent metadata

Field	Value
Publication number	US-11474063-B2
Application number	US-202016851243-A
Country	US
Kind code	B2
Filing date	Apr 17, 2020
Priority date	Dec 20, 2017
Publication date	Oct 18, 2022
Grant date	Oct 18, 2022

Abstract

A semiconductor device that includes a semiconductor substrate having a first main surface and a second main surface opposed to each other, and a porous metal oxide film on a side of the first main surface of the semiconductor substrate, the porous metal oxide film having a plurality of pores. The semiconductor substrate has a connection electrically connected to the porous metal oxide film, and the semiconductor substrate is configured to provide a power supply path from the second main surface to the connection on the first main surface.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a semiconductor substrate having a first main surface and a second main surface opposed to each other;
a porous metal oxide film on a side of the first main surface of the semiconductor substrate, the porous metal oxide film having a plurality of pores,
wherein the semiconductor substrate has a connection electrically connected to the porous metal oxide film on the side of the first main surface of the semiconductor substrate, and the semiconductor substrate is configured to provide a power supply path from the second main surface to the connection; and
a first insulating film between the semiconductor substrate and the porous metal oxide film, the first insulating film defining a through hole, and wherein the porous metal oxide film is electrically connected to the connection through the through hole of the first insulating film.

2. The semiconductor device according to claim 1 , wherein the plurality of pores are opened toward a side of the porous metal oxide film opposite to the semiconductor substrate and extend in a direction that intersects with the first main surface of the semiconductor substrate.

3. The semiconductor device according to claim 1 , wherein the semiconductor substrate has an electrical resistivity of 100 ·cm or less.

4. A semiconductor device according to claim 1 , comprising:
a semiconductor substrate having a first main surface and a second main surface opposed to each other; and
a porous metal oxide film on a side of the first main surface of the semiconductor substrate, the porous metal oxide film having a plurality of pores,
wherein the semiconductor substrate has a connection electrically connected to the porous metal oxide film on the side of the first main surface of the semiconductor substrate, and the semiconductor substrate is configured to provide a power supply path from the second main surface to the connection, and
wherein the connection has a high-concentration region that is higher in impurity concentration than an area surrounding the high-concentration region.

5. A semiconductor device comprising:
a semiconductor substrate having a first main surface and a second main surface opposed to each other;
a porous metal oxide film on a side of the first main surface of the semiconductor substrate, the porous metal oxide film having a plurality of pores,
wherein the semiconductor substrate has a connection electrically connected to the porous metal oxide film on the side of the first main surface of the semiconductor substrate, and the semiconductor substrate is configured to provide a power supply path from the second main surface to the connection;
a first metal film including a power supply line that electrically connects the connection and the porous metal oxide film; and
an electrode pad on a side of the first main surface of the semiconductor substrate and electrically connected to an external circuit, and wherein the porous metal oxide film includes an oxide of a metal material included in the electrode pad.

6. The semiconductor device according to claim 5 , wherein the power supply line has contact with a surface of the porous metal oxide film opposing the semiconductor substrate.

7. The semiconductor device according to claim 5 , wherein the porous metal oxide film includes an oxide of a metal material included in the power supply line.

8. The semiconductor device according to claim 5 , further comprising:
a first capacitor electrode on a side of the porous metal oxide film opposite to the semiconductor substrate and extending in the plurality of pores;
a dielectric film on a side of the first capacitor electrode opposite to the semiconductor substrate and extending in the plurality of pores; and
a second capacitor electrode opposed to the first capacitor electrode with the dielectric film interposed between the first capacitor electrode and the second capacitor electrode.

Assignees

• Murata Manufacturing Co

Inventors

• Matsubara Hiroshi
• Izumitani Junko
• Ooe Hideaki
• Nemoto Masutaro

Classifications

• H10P30/20

  into semiconductor materials, e.g. for doping · CPC title

• H10P14/6938 Primary

  the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides · CPC title

• H10P14/6324

  Formation by anodic treatments, e.g. anodic oxidation · CPC title

• H10P14/665

  Porous materials · CPC title

• H10P14/6314

  of a metallic layer · CPC title