Pre-driver stage with adjustable biasing

Patent metadata

Field	Value
Publication number	US-11469727-B2
Application number	US-202016916749-A
Country	US
Kind code	B2
Filing date	Jun 30, 2020
Priority date	Feb 27, 2020
Publication date	Oct 11, 2022
Grant date	Oct 11, 2022

Abstract

An electrical system includes a power supply and an electrical circuit coupled to the power supply and including an operational amplifier. The operational amplifier includes an input stage and a pre-driver stage coupled to the input stage, wherein the pre-driver stage includes a first input terminal, a second input terminal, and a voltage supply terminal. The operational amplifier also includes an output stage with bipolar transistors coupled to the pre-driver stage. The pre-driver stage is configured to: detect a voltage differential across the first and second input terminals of the pre-driver stage; and provide an adjustable bias current based on the voltage differential.

First claim

What is claimed is:

1. An electrical system, comprising:
a power supply;
an electrical circuit coupled to the power supply and including an operational amplifier with:
an input stage;
a pre-driver stage coupled to the input stage, wherein the pre-driver stage includes a first input terminal, a second input terminal, and a voltage supply terminal; and
an output stage with bipolar transistors coupled to the pre-driver stage, wherein the pre-driver stage is configured to:
detect a voltage differential across the first and second input terminals of the pre-driver stage; and
provide an adjustable bias current based on the voltage differential.

2. The electrical system of claim 1 , wherein the pre-driver stage includes a bias current control circuit configured to provide the adjustable bias current based on the voltage differential due to an input voltage (Vina) at the first input terminal of the pre-driver stage and another voltage (Vinb) at the second input terminal of the pre-driver stage, wherein the adjustable bias current is a function of |Vina−Vinb|.

3. The electrical system of claim 2 , wherein the bias current control circuit is configured to add the adjustable bias current to a fixed bias current of the pre-driver stage, and wherein the adjustable bias current increases as |Vina−Vinb| increases.

4. The electrical system of claim 3 , wherein the bias current control circuit includes:
a class-AB bias current generator configured to output a control current as a function of Vina and Vinb; and
a current mirror coupled to the class-AB bias current generator, wherein the current mirror is configured to add the adjustable bias current to the fixed bias current of the pre-driver stage based on the control current.

5. The electrical system of claim 1 , wherein the pre-driver stage is a bipolar pre-driver stage that includes:
a first NPN bipolar transistor with a collector terminal coupled to the voltage supply terminal, with a base terminal coupled to the first input terminal, and with an emitter terminal coupled to a base terminal of a second NPN bipolar transistor of the bipolar pre-driver stage; and
a third NPN bipolar transistor with a collector terminal coupled to the voltage supply terminal, with a base terminal coupled to the second input terminal, and with an emitter terminal coupled to a base terminal of a fourth NPN bipolar transistor of the bipolar pre-driver stage.

6. The electrical system of claim 1 , wherein the pre-driver stage is a bipolar and complementary metal-oxide semiconductor (BiCMOS) pre-driver stage that includes:
a first n-type metal-oxide semiconductor (NMOS) transistor with a drain terminal coupled to the voltage supply terminal, with a gate terminal coupled to the first input terminal, and with a source terminal coupled to a base terminal of a first bipolar transistor of the BiCMOS pre-driver stage; and
a second NMOS transistor with a drain terminal coupled to the voltage supply terminal, with a gate terminal coupled to the second input terminal, and with a source terminal coupled to a base terminal of a second bipolar transistor of the BiCMOS pre-driver stage.

7. The electrical system of claim 6 , wherein the BiCMOS pre-driver circuit has a topology portion that includes:
the first bipolar transistor;
the second bipolar transistor with a collector terminal coupled to the output stage;
a third bipolar transistor with a base terminal coupled to the base terminal of the first bipolar transistor via first and second diodes in series with cathodes facing the base terminal of the third bipolar transistor; and
a fourth bipolar transistor with a collector terminal coupled to the output stage and with a base terminal coupled to the base terminal of the second bipolar transistor via third and fourth diodes in series with cathodes facing the base terminal of the fourth bipolar transistor,
wherein emitter terminals of the first and third bipolar transistors are coupled together,
wherein emitter terminals of the second and fourth bipolar transistors are coupled together, and
wherein the emitter terminals of the first and third bipolar transistors are coupled to the emitter terminals of the second and fourth bipolar transistors via a resistor.

8. The electrical system of claim 7 , wherein the base terminals of the first, second, third, and fourth bipolar transistors of the BiCMOS pre-driver stage are coupled to the class-AB bias current generator.

9. The electrical system of claim 8 , wherein the class-AB bias current generator has a transistor topology equal to the topology portion of the BiCMOS pre-driver stage.

10. An operational amplifier, comprising:
an input stage; and
a pre-driver stage coupled to the input stage, wherein the pre-driver stage includes:
a first input terminal;
a second input terminal; and
a bias current control circuit coupled to the first and second input terminals and configured to provide an adjustable bias current based on a voltage differential across the first and second input terminals; and

an output stage with bipolar transistors coupled to the pre-driver stage.

11. The operational amplifier of claim 10 , wherein the bias current control circuit is configured to increase the adjustable bias current in response to an increase in absolute value of the voltage differential across the first and second terminals.

12. The operational amplifier of claim 11 , wherein the bias current control circuit is configured to add the adjustable bias current to a fixed bias current of the pre-driver stage.

13. The operational amplifier of claim 10 , wherein the pre-driver stage is a bipolar and complementary metal-oxide semiconductor (BiCMOS) pre-driver stage that includes:
a first n-type metal-oxide semiconductor (NMOS) transistor with a drain terminal coupled to a voltage supply terminal of the pre-driver stage, with a gate terminal coupled to the first input terminal, and with a source terminal coupled to a base terminal of a first bipolar transistor of the BiCMOS pre-driver stage; and
a second NMOS transistor with a drain terminal coupled to the voltage supply terminal, with a gate terminal coupled to the second input terminal, and with a source terminal coupled to a base terminal of a second bipolar transistor of the BiCMOS pre-driver stage.

14. The operational amplifier of claim 13 , wherein the bias current control circuit includes:
a class-AB bias current generator configured to output a control current as a function of the absolute value of the voltage differential across the input terminals; and
a current mirror coupled to the class-AB bias current generator, wherein the current mirror is configured to add the adjustable bias current to the fixed bias current of the BiCMOS pre-driver stage based on the control current.

15. The operational amplifier of claim 13 , wherein the BiCMOS pre-driver stage has a topology portion that includes:
the first bipolar transistor;
the second bipolar transistor with a collector terminal coupled to the output stage;
a third bipolar transistor with a base terminal coupled to the base terminal of the first bipolar transistor via first and second diodes in series with cathodes facing the base terminal of the third bipolar transistor; and
a fourth bipolar transistor with a collector terminal coupled to the output stage and with a base terminal coupled to the base terminal of the second bipolar transistor via third and fourth diodes in series with cathodes facing the base terminal of the fourth bipolar transistor,
wherein emitter terminals of the first and third bipolar transistors are coupled together,
wher

Assignees

• Texas Instruments Inc

Inventors

• Snoeij Martijn Fridus

Classifications

• H03F2203/45626

  the LC comprising biasing means controlled by the input signal · CPC title

• H03F2203/45344

  At least one of the AAC sub-circuits being a current mirror · CPC title

• H03F2203/45112

  the biasing of the differential amplifier being controlled from the input or the output signal · CPC title

• H03F1/307

  in push-pull amplifiers · CPC title

• H03F2203/45674

  the LC comprising one current mirror · CPC title