Technologies for managing a latency-efficient pipeline through a network interface controller

US11467885B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11467885-B2
Application numberUS-201715859394-A
CountryUS
Kind codeB2
Filing dateDec 30, 2017
Priority dateAug 30, 2017
Publication dateOct 11, 2022
Grant dateOct 11, 2022

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  1. Title

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Technologies for processing network packets a compute device with a network interface controller (NIC) that includes a host interface, a packet processor, and a network interface. The host interface is configured to receive a transaction from the compute engine, wherein the transaction includes latency-sensitive data, determine a context of the latency-sensitive data, and verify the latency-sensitive data against one or more server policies as a function of the determined context. The packet processor is configured to identify a trust associated with the latency-sensitive data, determine whether to verify the latency-sensitive data against one or more network policies as a function of the identified trust, apply the one or more network policies, and encapsulate the latency-sensitive data into a network packet. The network interface is configured to transmit the network packet via an associated Ethernet port of the NIC. Other embodiments are described herein.

First claim

Opening claim text (preview).

The invention claimed is: 1. An apparatus comprising: a network interface controller (NIC) comprising a host interface, a packet processor, and a network interface, wherein the NIC is to: receive, by the host interface, a transaction from a compute engine, wherein the transaction includes latency-sensitive data; determine, by the host interface, a context of the latency-sensitive data; verify, by the host interface, the latency-sensitive data against one or more server policies as a function of the determined context, wherein each of the one or more server policies include a set of rules usable to a identify whether an application is authorized to access one or more resources of the NIC; identify, by the packet processor, a trust associated with the latency-sensitive data; determine, by the packet processor, whether to verify the latency-sensitive data against one or more network policies as a function of the identified trust, wherein each of the one or more network policies include a set of rules usable to ensure malicious actions are not being undertaken by the application; apply, by the packet processor and in response to a determination to verify the latency-sensitive data against the one or more network policies, the one or more network policies; encapsulate, by the packet processor and subsequent to having successfully applied the one or more network policies, the latency-sensitive data into a network packet; and transmit, by the network interface, the network packet via an associated network port of the NIC. 2. The apparatus of claim 1 , wherein to receive the transaction includes to store the latency-sensitive data in a partition of a transmit buffer of the NIC. 3. The apparatus of claim 1 , wherein the NIC is further to enqueue the latency-sensitive data in one of a plurality of context queues based on the determined context. 4. The apparatus of claim 1 , wherein to determine the context of the latency-sensitive data comprises to (i) extract one or more transaction attributes from the transaction and (ii) determine the context as a function of the extracted one or more transaction attributes. 5. The apparatus of claim 1 , wherein to verify the latency-sensitive data against one or more server policies comprises to perform a lookup on a server policy table as a function of the determined context to identify the one or more server policies and verifying the one or more identified server policies against at least a portion of the latency-sensitive data. 6. The apparatus of claim 1 , comprising the compute engine, wherein the compute engine comprises one or more processors and a memory. 7. The apparatus of claim 1 , wherein to identify the trust associated with the latency-sensitive data comprises to (i) parse the latency-sensitive data and (ii) analyze the parsed latency-sensitive data to identify a workload type of the latency-sensitive data. 8. The apparatus of claim 7 , wherein to determine whether to verify the latency-sensitive data against the one or more network policies comprises to perform a lookup on a network policy table as a function of the workload type to identify the one or more network policies. 9. The apparatus of claim 1 , wherein the trust comprises one of an extrinsic trust or an intrinsic trust, and wherein the trust is identified as either the extrinsic trust or the intrinsic trust as a function of an environment in which the application is presently being executed. 10. The apparatus of claim 9 , wherein the trust comprises an intrinsic trust in response to a determination that the environment is a trusted environment, and wherein the trust comprises an extrinsic trust in response to a determination that the environment is an untrusted environment. 11. The apparatus of claim 1 , wherein the NIC is further to: identify, by the packet processor, a quality of service (QoS) differentiator associated with the latency-sensitive data, wherein the QoS differentiator is usable to identify a network traffic priority of the latency-sensitive data, determine, by the packet processor, whether to place the network packet directly on a wire as a function of the QoS differentiator; and notify, by the packet processor and subsequent to a determination not to place the network packet directly on the wire, a traffic manager of the NIC that the network packet is available to be scheduled for transmission on the wire via the associated network port of the NIC. 12. The apparatus of claim 11 , wherein the NIC is further to place, by the network interface and subsequent to a determination to place the network packet directly on the wire, the network packet on the wire via the associated network port of the NIC. 13. One or more non-transitory machine-readable storage media comprising a plurality of instructions stored thereon that, in response to being executed, cause a compute device to: receive, by a host interface of a network interface controller (NIC), a transaction from a compute engine, wherein the transaction includes latency-sensitive data; determine, by the host interface, a context of the latency-sensitive data; verify, by the host interface, the latency-sensitive data against one or more server policies as a function of the determined context, wherein each of the one or more server policies include a set of rules usable to a identify whether an application is authorized to access one or more resources of the NIC; identify, by a packet processor of the NIC, a trust associated with the latency-sensitive data; determine, by the packet processor, whether to verify the latency-sensitive data against one or more network policies as a function of the identified trust, wherein each of the one or more network policies include a set of rules usable to ensure malicious actions are not being undertaken by the application; apply, by the packet processor and in response to a determination to verify the latency-sensitive data against the one or more network policies, the one or more network policies; encapsulate, by the packet processor and subsequent to having successfully applied the one or more network policies, the latency-sensitive data into a network packet; and transmit, by a network interface of the NIC, the network packet via an associated network port of the NIC. 14. The one or more non-transitory machine-readable storage media of claim 13 , wherein to receive the transaction includes to store the latency-sensitive data in a partition of a transmit buffer of the NIC. 15. The one or more non-transitory machine-readable storage media of claim 13 , wherein the plurality of instructions further cause the NIC to enqueue the latency-sensitive data in one of a plurality of context queues based on the determined context. 16. The one or more non-transitory machine-readable storage media of claim 13 , wherein to determine the context of the latency-sensitive data comprises to (i) extract one or more transaction attributes from the transaction and (ii) determine the context as a function of the extracted one or more transaction attributes. 17. The one or more non-transitory machine-readable storage media of claim 13 , wherein to verify the latency-sensitive data against one or more server policies comprises to perform a lookup on a server policy table as a function of the determined context to identify the one or more server policies and verifying the one or more identified server policies against at least a portion of the latency-sensitive data. 18. The one or more non-transitory machine-readable storage media of claim 13 , wherein to identi

Assignees

Inventors

Classifications

  • where the computing system is distributed, e.g. networked systems, clusters, multiprocessor systems (multiprogramming arrangements G06F9/46; allocation of resources G06F9/50) · CPC title

  • related to network devices · CPC title

  • Arrangements for software license management or administration, e.g. for managing licenses at corporate level · CPC title

  • Resource management, Optimisation arrangements, e.g. configuration, identification, tracking, physical location (thermal management H05K7/20836) · CPC title

  • Thermal management, e.g. fan control · CPC title

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What does patent US11467885B2 cover?
Technologies for processing network packets a compute device with a network interface controller (NIC) that includes a host interface, a packet processor, and a network interface. The host interface is configured to receive a transaction from the compute engine, wherein the transaction includes latency-sensitive data, determine a context of the latency-sensitive data, and verify the latency-sen…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F1/183. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 11 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).