Systems and methods for preventing data remanence in memory
US-9740638-B2 · Aug 22, 2017 · US
US11467635B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11467635-B2 |
| Application number | US-201816171921-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 26, 2018 |
| Priority date | Oct 27, 2017 |
| Publication date | Oct 11, 2022 |
| Grant date | Oct 11, 2022 |
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Embodiments of the present disclosure relate to storage processor and storage system. A storage processor comprises a housing provided with a cover and a main power supply input, which, for example, connects an external power source to supply power to the storage processor. A battery is disposed within the housing and configured to continue supplying power to the storage processor in response to the main power supply input being cut off. A protection device is disposed within the housing and configured to disable the battery to supply power to the storage processor in response to determining that the cover is opened.
Opening claim text (preview).
We claim: 1. A storage processor ( 100 ), comprising: a housing ( 110 ) comprising a cover ( 112 ); a main power supply input ( 130 ) configured to be connected to an external power source to supply power to the storage processor ( 100 ); a battery ( 160 ) disposed within the housing ( 110 ) and configured to continue supplying power to the storage processor ( 100 ) in response to the main power supply input being cut off; a protection device ( 150 ) disposed within the housing ( 110 ) and configured to, in response to determining that the cover ( 112 ) is opened, disable the battery ( 160 ) to supply power to the storage processor ( 100 ); and a Baseboard Management Controller (BMC) ( 120 ) comprising an output terminal configured to output a fourth signal for selectively enabling or disabling the protection device ( 150 ), wherein the protection device ( 150 ) further comprises: a second switch (T 2 ) having a control terminal coupled to the output terminal of the BMC ( 120 ) and an output terminal coupled to a light emitting device (D 1 ) to selectively supply power to the light emitting device (D 1 ) according to the fourth signal. 2. The storage processor ( 100 ) of claim 1 , wherein the protection device ( 150 ) comprises: the light emitting device (D 1 ) configured to emit light when the storage processor ( 100 ) is powered on; and a sensor (S 1 ) configured to, in response to sensing the light emitted by the light emitting device (D 1 ), output, at an output terminal, a first signal indicating that the cover ( 112 ) is opened. 3. The storage processor ( 100 ) of claim 2 , wherein the cover ( 112 ) comprises a shield ( 22 ), the shield ( 22 ) being arranged to be disposed between the light emitting device (D 1 ) and the sensor (S 1 ) to block the light emitted by the light emitting device (D 1 ) from reaching the sensor (S 1 ) if the cover ( 112 ) is closed, and the shield ( 22 ) being arranged to be removed from between the light emitting device (D 1 ) and the sensor (S 1 ) such that the light emitted by the light emitting device (D 1 ) can reach the sensor (S 1 ) if the cover ( 112 ) is opened. 4. The storage processor ( 100 ) of claim 2 , wherein the protection device ( 150 ) further comprises: a first switch (T 1 ) coupled between a supply voltage (V Aux ) and a reference voltage and comprising a control terminal coupled to the output terminal of the sensor (S 1 ) and an output terminal coupled to the supply voltage (V Aux ), wherein the first switch (T 1 ) is configured to, in response to receiving the first signal via the control terminal, couple the output terminal of the first switch (T 1 ) to the reference voltage to output a second signal for disabling the battery ( 160 ). 5. The storage processor ( 100 ) of claim 4 , wherein the protection device ( 150 ) further comprises: a first resistor (R 4 ) connected between the supply voltage (V Aux ) and the output terminal of the first switch (T 1 ) and configured to, in response to the first switch (T 1 ) being turned on, couple the output terminal of the first switch (T 1 ) to the reference voltage to output the second signal, and in response to the first switch (T 1 ) being turned off, couple the output terminal of the first switch (T 1 ) to the supply voltage (V Aux ) to output a third signal for enabling the battery ( 160 ). 6. The storage processor ( 100 ) of claim 5 , wherein the sensor (S 1 ) is a phototransistor coupled between the supply voltage (V Aux ) and the reference voltage. 7. The storage processor ( 100 ) of claim 6 , wherein the protection device ( 150 ) further comprises: a second resistor (R 5 ) coupled between an output terminal of the phototransistor and the control terminal of the first switch (T 1 ) and the reference voltage, wherein the phototransistor turns on the first switch (T 1 ) by coupling the control terminal of the first switch (T 1 ) to the supply voltage (V AUX ) if the phototransistor is turned on. 8. The storage processor ( 100 ) of claim 4 , further comprising: a Baseboard Management Controller (BMC) ( 120 ) comprising an output terminal configured to, in response to determining that a capacity of the battery ( 160 ) is greater than a predetermined threshold, output a fifth signal with a high level; and an AND gate ( 140 ) comprising: a first input terminal ( 141 ) coupled to the output terminal of the first switch (T 1 ); a second input terminal ( 142 ) coupled to the output terminal of the BMC ( 120 ) and configured to receive the fifth signal; and an output terminal ( 143 ) coupled to an enable port of the battery ( 160 ) to selectively enable or disable the battery ( 160 ). 9. The storage processor ( 100 ) of claim 2 , wherein the light emitting device (D 1 ) is a light-emitting diode. 10. The storage processor ( 100 ) of claim 4 , wherein the first switch (T 1 ) is a Metal-Oxide Semiconductor Field Effect Transistor (MOSFET). 11. A storage system, comprising: a chassis; one or more storage processors ( 100 ), wherein the one or more storage processors being disposed on the chassis; and wherein each of the one or more storage processors comprising: a housing ( 110 ) comprising a cover ( 112 ); a main power supply input ( 130 ) configured to be connected to an external power source to supply power to the storage processor ( 100 ); a battery ( 160 ) disposed within the housing ( 110 ) and configured to continue supplying power to the storage processor ( 100 ) in response to the main power supply input being cut off; a protection device ( 150 ) disposed within the housing ( 110 ) and configured to, in response to determining that the cover ( 112 ) is opened, disable the battery ( 160 ) to supply power to the storage processor ( 100 ); and a Baseboard Management Controller (BMC) ( 120 ) comprising an output terminal configured to output a fourth signal for selectively enabling or disabling the protection device ( 150 ), wherein the protection device ( 150 ) further comprises: a second switch (T 2 ) having a control terminal coupled to the output terminal of the BMC ( 120 ) and an output terminal coupled to a light emitting device (D 1 ) to selectively supply power to the light emitting device (D 1 ) according to the fourth signal.
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