Systems and methods for preventing data remanence in memory

Patent metadata

Field	Value
Publication number	US-9740638-B2
Application number	US-201614990572-A
Country	US
Kind code	B2
Filing date	Jan 7, 2016
Priority date	Dec 29, 2011
Publication date	Aug 22, 2017
Grant date	Aug 22, 2017

Abstract

A system for preventing data remanence in memory is provided. The system includes a computing device, a memory chip coupled to the computing device and including memory, and a heater, the heater configured to prevent data remanence in a memory by providing heat to at least a portion of the memory. The memory includes a plurality of bits configured to electronically store data.

First claim

What is claimed is:

1. A method for storing sensitive data, comprising:
determining the sensitivity of a data; and
storing the data in a memory based on the sensitivity;
wherein the memory comprises a plurality of bits configured to electronically store the data, and wherein a portion of the memory is configured to have minimal increased data remanence upon cooling of the memory.

2. The method of claim 1 , wherein the determining is based on the data comprising an encryption program parameters.

3. The method of claim 1 , wherein the determining is based on the data comprising an encryption key.

4. The method of claim 1 , wherein the determining is based on the data comprising encrypted data.

5. The method of claim 1 , wherein the storing comprises storing data determined to be sensitive in the portion of the memory configured to have minimal increased data remanence.

6. The method of claim 1 , wherein the portion of the memory configured to have minimal increased data remanence comprises bi-polar junction transistors.

7. The method of claim 1 , further comprising determining remanence decay values for the plurality of bits, correlating the sensitivity of the data with the remanence decay values, and storing the data in the memory based on the correlation of the sensitivity of the data with the remanence decay values.

8. The method of claim 7 , further comprising storing the remanence decay values in a data structure.

9. The method of claim 8 , further comprising updating the data structure based on new remanence decay values.

10. The method of claim 9 , further comprising determining new remanence decay values for a plurality of bits within the memory.

11. The method of claim 10 , wherein updating the data structure overwrites an initial set of remanence decay values, and wherein the initial set of remanence decay values are determined before the memory is installed in the computing device.

12. The method of claim 7 , wherein the remanence decay values are stored in a memory spaced apart from the memory chip.

13. The method of claim 7 , wherein the remanence decay values are determined after the memory is installed in a computing device.

14. The method of claim 7 , wherein the most sensitive data is stored in the bits with the fastest remanence decay values.

15. The method of claim 7 , wherein the correlation is based on the type of data.

16. A system for protecting sensitive data in a memory of a computing device, comprising:
processing electronics configured to:
determine remanence decay values for a plurality of sites of a memory; and
store data in one or more memory sites of the memory based on remanence decay values of each memory site.

17. The system of claim 16 , wherein the processing electronics are further configured to store the remanence decay values and the corresponding memory sites in a data structure.

18. The system of claim 17 , wherein the processing electronics are further configured to update the data structure based on new remanence decay values.

19. The system of claim 18 , wherein the processing electronics are further configured to determine new remanence decay values for a plurality of memory sites within the memory.

20. The system of claim 18 , wherein the data structure is updated after regular time intervals.

21. The system of claim 18 , wherein the data structure is updated each time the computing device is powered on.

22. The system of claim 18 , wherein the data structure is updated each time the computing device is powered off.

23. The system of claim 18 , wherein updating the data structure overwrites an initial set of remanence decay values, and wherein the initial set of remanence decay values are determined before the memory is installed in the computing device.

24. The system of claim 16 , wherein the processing electronics are configured to determine the remanence decay values after the memory is installed in the computing device.

25. The system of claim 16 , wherein the processing electronics are configured to correlate the sensitivity of the data with the remanence decay values.

26. The system of claim 25 , wherein the most sensitive data is stored in memory sites with the fastest remanence decay values.

27. A system for protecting sensitive data in a memory of a computing device, comprising:
means for determining remanence decay values for a plurality of sites of a memory, and
means for storing data in one or more memory sites of the memory based on remanence decay values of each memory site.

28. The system of claim 27 , further comprising means for storing the remanence decay values and the corresponding memory sites in a data structure.

29. The system of claim 28 , wherein the data structure is updated based on new remanence decay values.

30. The system of claim 28 , wherein the data structure is updated after regular time intervals.

31. The system of claim 28 , wherein the data structure is updated each time the computing device is powered on.

32. The system of claim 28 , wherein the data structure is updated each time the computing device is powered off.

33. The system of claim 28 , wherein updating the data structure overwrites an initial set of remanence decay values, and wherein the initial set of remanence decay values are determined before the memory is installed in the computing device.

Assignees

• Elwha Llc

Inventors

• Hyde Roderick A
• Wood Jr Lowell L

Classifications

• H04L9/0822

  using key encryption key · CPC title

• G06F21/6218 Primary

  to a system of files or objects, e.g. local or distributed file system or database · CPC title

• G11C5/005

  Circuit means for protection against loss of information of semiconductor storage devices · CPC title

• G06F3/0629

  Configuration or reconfiguration of storage systems · CPC title

• G06F21/79 Primary

  in semiconductor storage media, e.g. directly-addressable memories · CPC title