Compensated power detector

US11454657B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11454657-B2
Application numberUS-201916435866-A
CountryUS
Kind codeB2
Filing dateJun 10, 2019
Priority dateJun 10, 2018
Publication dateSep 27, 2022
Grant dateSep 27, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

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In some embodiments, a compensated power detector can include a power detector that includes a first detection cell having a bias input and an output, and a second detection cell having a signal input, a bias input and an output. The power detector can further include an error amplifier having a first input coupled to the output of the first detection cell, and a second input for receiving a reference voltage. The error amplifier can be configured to provide an output voltage to each of the bias inputs of the first and second detection cells, such that an output of the second detection cell is representative of power of a radio-frequency signal received at the signal input with an adjustment for one or more non-signal effects as measured by the first detection cell and the error amplifier.

First claim

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What is claimed is: 1. A power detector comprising: a first detection cell including a first emitter follower detector having a base, a collector and an emitter, the first detection cell configured such that the base only receives a bias voltage, the collector is only coupled to a supply node, and the emitter provides an output; a second detection cell including a second emitter follower detector having a base, a collector and an emitter, the second detection cell configured such that the base receives a bias voltage and a radio-frequency signal, the collector is coupled to a supply node and a filter capacitance, and the emitter provides an output; and an error amplifier having a first input coupled to the output of the first emitter follower detector, a second input for receiving a reference voltage, and an output coupled to the base of each of the first and second emitter follower detectors, such that the bias voltage provided to the base of the first emitter follower detector is representative of an output voltage of the error amplifier and is the same as the bias voltage provided to the base of the second emitter follower detector. 2. The power detector of claim 1 wherein the first detection cell and the second detection cell are substantially identical other than the first detection cell not receiving the radio-frequency signal and the second detection cell receiving the radio-frequency signal. 3. The power detector of claim 1 wherein the error amplifier includes a first transistor having a base coupled to the first input, a collector coupled to a supply circuit, and an emitter, the error amplifier further including a second transistor having a base coupled to the second input, a collector coupled to the supply circuit, and an emitter coupled to the emitter of the first transistor. 4. The power detector of claim 3 wherein the collector of the first transistor is configured to provide the output voltage of the error amplifier. 5. The power detector of claim 4 wherein the error amplifier further includes an output capacitance that couples the collector of the first transistor to ground. 6. The power detector of claim 3 wherein the supply circuit includes a first transistor and a second transistor each having a source, a gate and a drain, the source of each of the first and second transistors coupled to a regulated voltage node, the gates of the first and second transistors coupled to each other and to the drain of the first transistor. 7. The power detector of claim 6 wherein the drain of the first transistor of the supply circuit is coupled to the collector of the first transistor of the error amplifier, and the drain of the second transistor of the supply circuit is coupled to the collector of the second transistor of the error amplifier. 8. The power detector of claim 1 wherein the reference voltage includes a regulated voltage based on a bandgap voltage. 9. The power detector of claim 1 wherein the emitter of the second emitter follower detector is configured to provide an output that is representative of power of the radio-frequency signal with an adjustment for either or both of a temperature variation and a process variation. 10. A semiconductor die comprising: a semiconductor substrate; and a power detector implemented on the semiconductor substrate, the power detector including a first detection cell including a first emitter follower detector having a base, a collector and an emitter, the first detection cell configured such that the base only receives a bias voltage, the collector is only coupled to a supply node, and the emitter provides an output, the power detector further including a second detection cell including a second emitter follower detector having a base, a collector and an emitter, the second detection cell configured such that the base receives a bias voltage and a radio-frequency signal, the collector is coupled to a supply node and a filter capacitance, and the emitter provides an output, the power detector further including an error amplifier having a first input coupled to the output of the first emitter follower detector, a second input for receiving a reference voltage, and an output coupled to the base of each of the first and second emitter follower detectors, such that the bias voltage provided to the base of the first emitter follower detector is representative of an output voltage of the error amplifier and is the same as the bias voltage provided to the base of the second emitter follower detector. 11. A packaged module comprising: a packaging substrate configured to receive a plurality of components; and a power detector implemented on the packaging substrate, the power detector including a first detection cell including a first emitter follower detector having a base, a collector and an emitter, the first detection cell configured such that the base only receives a bias voltage, the collector is only coupled to a supply node, and the emitter provides an output, the power detector further including a second detection cell including a second emitter follower detector having a base, a collector and an emitter, the second detection cell configured such that the base receives a bias voltage and a radio-frequency signal, the collector is coupled to a supply node and a filter capacitance, and the emitter provides an output, the power detector further including an error amplifier having a first input coupled to the output of the first emitter follower detector, a second input for receiving a reference voltage, and an output coupled to the base of each of the first and second emitter follower detectors, such that the bias voltage provided to the base of the first emitter follower detector is representative of an output voltage of the error amplifier and is the same as the bias voltage provided to the base of the second emitter follower detector. 12. The packaged module of claim 11 further including a radio-frequency circuit associated with the radio-frequency signal. 13. The packaged module of claim 12 wherein both of the power detector and the radio-frequency circuit are implemented on a single semiconductor die. 14. The packaged module of claim 12 wherein the power detector is implemented on a first semiconductor die, and the radio-frequency circuit is implemented on a second semiconductor die.

Assignees

Inventors

Classifications

  • for antennas · CPC title

  • for HF amplifiers · CPC title

  • at high-frequency [HF] or radio frequency [RF] · CPC title

  • A non-specified detector of the power of a signal being used in an amplifying circuit · CPC title

  • the amplifier being a radio frequency amplifier · CPC title

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What does patent US11454657B2 cover?
In some embodiments, a compensated power detector can include a power detector that includes a first detection cell having a bias input and an output, and a second detection cell having a signal input, a bias input and an output. The power detector can further include an error amplifier having a first input coupled to the output of the first detection cell, and a second input for receiving a re…
Who is the assignee on this patent?
Skyworks Solutions Inc
What technology area does this patent fall under?
Primary CPC classification G01R21/14. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 27 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).