Flexible printed circuit board with embedded electronic element

Patent metadata

Field	Value
Publication number	US-11430737-B2
Application number	US-201916537923-A
Country	US
Kind code	B2
Filing date	Aug 12, 2019
Priority date	Dec 4, 2018
Publication date	Aug 30, 2022
Grant date	Aug 30, 2022

Abstract

Provided is a printed circuit board including a laminate that is formed by vertically stacking a plurality of insulating layers including a rigid insulating layer, a flexible insulating layer having a first region in vertical contact with at least one of the plurality of insulating layers and a second region located on an outer side of the laminate, and a first electronic element embedded in the flexible insulating layer.

First claim

What is claimed is:

1. A printed circuit board comprising:
a laminate including a plurality of rigid insulating layers, and a first region of a flexible insulating layer disposed between the plurality of rigid insulating layers;
wherein the flexible insulating layer comprises a second region located on an outer side of the laminate,
wherein a first electronic element and a circuit are embedded in the second region of the flexible insulating layer,
wherein a first portion of the circuit is embedded in the flexible insulating layer, and a second portion of the circuit protrudes from the flexible insulating layer, and
wherein a first end of the first portion is completely enclosed by the flexible insulating layer, and the first portion extends to a second end opposite to the first end to contact the second portion.

2. The printed circuit board of claim 1 , wherein a cavity is formed in the flexible insulating layer, and
the first electronic element is configured to be inserted into the cavity.

3. The printed circuit board of claim 2 , wherein at least one mounting pad is formed on a bottom surface of the cavity.

4. The printed circuit board of claim 3 , wherein the first electronic element is configured to be mounted on the at least one mounting pad.

5. The printed circuit board of claim 4 , wherein a first part of the mounting pad is located inside the cavity and a second part of the mounting pad is located outside the cavity.

6. The printed circuit board of claim 2 , wherein the cavity is filled with a filling member.

7. The printed circuit board of claim 1 , wherein the flexible insulating layer comprises a thermoplastic resin layer and a thermosetting resin layer, which are vertically stacked.

8. The printed circuit board of claim 1 , further comprising a coverlay stacked on the second region of the flexible insulating layer located on the outer side of the laminate.

9. The printed circuit board of claim 1 , wherein the laminate comprises the plurality of rigid insulating layers, a plurality of flexible layers, and the flexible insulating layer, and
the flexible layers are more flexible than the rigid insulating layers.

10. The printed circuit board of claim 9 , wherein the flexible layers comprise a thermoplastic resin layer and a thermosetting resin layer.

11. The printed circuit board of claim 1 , further comprising a second electronic element mounted on one surface of the laminate.

12. The printed circuit board of claim 1 , wherein the circuit includes a circuit line disposed over the flexible insulating layer.

13. A printed circuit board comprising:
a rigid portion; and
a flexible portion, comprising a first region embedded between layers of the rigid portion,
wherein a first electronic element and a circuit are embedded in a second region of the flexible portion external to the rigid portion,
wherein a first portion of the circuit is embedded in the flexible portion, and a second portion of the circuit protrudes from the flexible portion, and
wherein a first end of the first portion is completely enclosed by the flexible insulating layer, and the first portion extends to a second end opposite to the first end to contact the second portion.

14. The printed circuit board of claim 13 , wherein a cavity is formed in the flexible portion, and the first electronic element is configured to be inserted into the cavity.

15. The printed circuit board of claim 14 , wherein at least one mounting pad is formed on a bottom surface of the cavity.

16. The printed circuit board of claim 15 , wherein the first electronic element is configured to be mounted on the at least one mounting pad.

17. The printed circuit board of claim 15 , wherein a first part of the mounting pad is located inside the cavity and a second part of the mounting pad is located outside the cavity.

18. The printed circuit board of claim 13 , wherein a second electronic element is mounted on one surface of the rigid portion.

19. A method of manufacturing a printed circuit board, comprising:
disposing a laminate by vertically stacking a first region of a flexible insulating layer between a plurality of rigid insulating regions;
disposing a second region of the flexible insulating layer on an outer side of the laminate; and
embedding a first electronic element and a circuit in the second region of the flexible insulating layer,
wherein a first portion of the circuit is embedded in the flexible insulating layer, and a second portion of the circuit protrudes from the flexible insulating layer, and
wherein a first end of the first portion is completely enclosed by the flexible insulating layer, and the first portion extends to a second end opposite to the first end to contact the second portion.

20. The method of claim 19 , further comprising stacking a coverlay on the second region of the flexible insulating layer located on the outer side of the laminate.

21. The method of claim 19 , wherein the laminate comprises the plurality of rigid insulating layers, a plurality of flexible layers, and the flexible insulating layer, and
the flexible layers are more flexible than the rigid insulating layers.

Assignees

• Samsung Electro Mech

Inventors

• Ham Ho-Hyung
• Lee Sa-Yong
• Kim Ju-Ho

Classifications

• H10W70/6528

  of the portions that connect to chips, wafers or package parts · CPC title

• H10W70/685

  comprising multiple insulating layers · CPC title

• H10W70/614

  the multiple chips being integrally enclosed · CPC title

• H10W70/093

  Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title