Multi-controller inspection system

US11415526B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11415526-B2
Application numberUS-202017136919-A
CountryUS
Kind codeB2
Filing dateDec 29, 2020
Priority dateMay 6, 2020
Publication dateAug 16, 2022
Grant dateAug 16, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An inspection system is disclosed. The inspection system includes a shared memory configured to receive image data from a defect inspection tool and a controller communicatively coupled to the shared memory. The controller includes a host image module configured to apply one or more general-purpose defect-inspection algorithms to the image data using central-processing unit (CPU) architectures, a results module configured to generate inspection data for defects identified by the host image module, and secondary image module(s) configured to apply one or more targeted defect-inspection algorithms to the image data. The secondary image module(s) employ flexible sampling of the image data to match a data processing rate of the host image module within a selected tolerance. The flexible sampling of the image data is adjusted responsive to the inspection data generated by the results module and the host image module.

First claim

Opening claim text (preview).

What is claimed: 1. An inspection system comprising: a shared memory communicatively coupled to a defect inspection tool, wherein the shared memory is configured to receive image data generated by the defect inspection tool; and a controller communicatively coupled to the shared memory including: a host image module, wherein the host image module comprises program instructions maintained in memory and configured to cause one or more processors to apply one or more general-purpose defect-inspection algorithms to the image data, wherein the one or more general-purpose defect-inspection algorithms are configured to identify a plurality of defect types in the image data using central-processing unit (CPU) architectures, wherein the host image module fully samples the image data; one or more secondary image modules, wherein the one or more secondary image modules comprise program instructions maintained in memory and configured to cause one or more processors to apply one or more targeted defect-inspection algorithms to the image data, wherein at least some of the one or more targeted defect-inspection algorithms are tailored to identify a targeted subset of the plurality of defect types in the image data, wherein the one or more secondary image modules employ flexible sampling of the image data to match a data processing rate of the host image module within a selected tolerance; and a results module, wherein the results module comprises program instructions maintained in memory and configured to cause one or more processors to generate inspection data for defects identified by the host image module or the one or more secondary image modules. 2. The inspection system of claim 1 , wherein at least some of the one or more secondary image modules utilize CPU architectures to implement at least some of the one or more targeted defect-inspection algorithms. 3. The inspection system of claim 1 , wherein at least some of the one or more secondary image modules utilize graphical-processing unit (GPU) architectures to implement at least some of the one or more targeted defect-inspection algorithms. 4. The inspection system of claim 1 , wherein at least some of the one or more secondary image modules utilize non-CPU math accelerators to implement at least some of the one or more targeted defect-inspection algorithms. 5. The inspection system of claim 1 , wherein at least some of the one or more secondary image modules utilize a neural network to implement at least some of the one or more targeted defect-inspection algorithms. 6. The inspection system of claim 1 , wherein at least some of the one or more secondary image modules utilize deep-learning to implement at least some of the one or more targeted defect-inspection algorithms. 7. The inspection system of claim 1 , wherein at least one of the one or more secondary image modules is configured to identify one or more known defect types of the plurality of defect types and is further configured to employ flexible sampling of the image data to sample one or more care areas in the image data. 8. The inspection system of claim 7 , wherein the one or more care areas include portions of the image data associated with locations susceptible to the one or more known defect types. 9. The inspection system of claim 1 , wherein the controller further includes a sample plan module configured to generate a plurality of inspection jobs based on the image data. 10. The inspection system of claim 9 , wherein at least one of the one or more secondary image modules is configured to employ flexible sampling of the image data by disregarding one or more inspection jobs to match the data processing rate of the host image module within the selected tolerance. 11. The inspection system of claim 1 , wherein the inspection data includes pixel-level data. 12. The inspection system of claim 1 , wherein the inspection data includes separate datasets for at least some of the one or more general-purpose defect-inspection algorithms or at least some of the one or more targeted defect-inspection algorithms. 13. The inspection system of claim 1 , wherein the inspection data includes a common dataset for the one or more general-purpose defect-inspection algorithms and the one or more targeted defect-inspection algorithms. 14. The inspection system of claim 13 , wherein the inspection data for an identified defect includes an indication of which of the one or more general-purpose defect-inspection algorithms or the one or more targeted defect-inspection algorithms identified the identified defect. 15. An inspection system comprising: a shared memory communicatively coupled to a defect inspection tool, wherein the shared memory is configured to receive image data generated by the defect inspection tool; and a controller communicatively coupled to the shared memory including: a host image module, wherein the host image module comprises program instructions maintained in memory and configured to cause one or more processors to apply one or more general-purpose defect-inspection algorithms to the image data, wherein the one or more general-purpose defect-inspection algorithms are configured to identify a plurality of defect types in the image data using central-processing unit (CPU) architectures, wherein the host image module fully samples the image data; a results module, wherein the results module comprises program instructions maintained in memory and configured to cause one or more processors to generate inspection data for defects identified by the host image module; and one or more secondary image modules, wherein the one or more secondary image modules comprise program instructions maintained in memory and configured to cause one or more processors to apply one or more targeted defect-inspection algorithms to the image data, wherein at least some of the one or more targeted defect-inspection algorithms are tailored to identify a targeted subset of the plurality of defect types in the image data, wherein the one or more secondary image modules employ flexible sampling of the image data to match a data processing rate of the host image module within a selected tolerance, wherein the flexible sampling of the image data is adjusted responsive to the inspection data generated by the results module and the host image module, wherein the results module is further configured to generate inspection data for defects identified by the one or more secondary image modules. 16. The inspection system of claim 15 , wherein at least one of the one or more secondary image modules is configured to identify one or more known defect types of the plurality of defect types and is further configured to employ the flexible sampling of the image data to sample one or more care areas in the image data. 17. The inspection system of claim 16 , wherein the one or more care areas include portions of the image data associated with locations susceptible to the one or more known defect types. 18. The inspection system of claim 16 , wherein inspection data generated by the results module indicates zero or no defects in the one or more care areas inspected by the one or more general-purpose defect-inspection algorithms, wherein the one or more care areas are flexibly sampled from the image data for the one or more targeted defect-inspection algorithms based on the indication of zero or no defects in the one or more care areas inspected by the one or more general-purpose defect-inspection algorithms, wherein the one or more targeted defect-inspection algorithms verify the indication of

Assignees

Inventors

Classifications

  • Semiconductor; IC; Wafer · CPC title

  • Artificial neural networks [ANN] · CPC title

  • from scanning electron microscope · CPC title

  • G06T7/0004Primary

    Industrial image inspection · CPC title

  • Semiconductor wafers (manufacturing processes per se of semiconductor devices implementing a measuring step H10P74/20) · CPC title

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Frequently asked questions

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What does patent US11415526B2 cover?
An inspection system is disclosed. The inspection system includes a shared memory configured to receive image data from a defect inspection tool and a controller communicatively coupled to the shared memory. The controller includes a host image module configured to apply one or more general-purpose defect-inspection algorithms to the image data using central-processing unit (CPU) architectures,…
Who is the assignee on this patent?
Kla Corp
What technology area does this patent fall under?
Primary CPC classification G06T7/0004. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 16 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).