Die for a printhead

US11413864B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11413864-B2
Application numberUS-201916766523-A
CountryUS
Kind codeB2
Filing dateFeb 6, 2019
Priority dateFeb 6, 2019
Publication dateAug 16, 2022
Grant dateAug 16, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A die for a printhead is described herein. The die includes a number of fluid feed holes disposed in a line parallel to a longitudinal axis of the die, wherein the fluid feed holes are formed through a substrate of the die. A number of fluidic actuators are proximate to the fluid feed holes to eject fluid received from the plurality of fluid feed holes. The die includes logic circuitry to operate the fluidic actuators, wherein the logic circuitry is disposed on a first side of the plurality of fluid feed holes. Power circuitry to power the plurality of fluidic actuators is disposed on an opposite side of the fluid feed holes from the logic circuitry. Activation traces are disposed between each of the fluid feed holes to couple the logic circuitry to the power circuitry.

First claim

Opening claim text (preview).

What is claimed is: 1. A die for a printhead, comprising: a substrate having a plurality of fluid feed holes formed through the substrate, the plurality of fluid feed holes disposed in a line parallel to a longitudinal axis of the die; a plurality of fluidic actuators, proximate to the plurality of fluid feed holes, to eject fluid received from the plurality of fluid feed holes; logic circuitry to operate the plurality of fluidic actuators, wherein the logic circuitry is disposed on a first side of the plurality of fluid feed holes; power circuitry to power the plurality of fluidic actuators, wherein the power circuitry is disposed on an opposite side of the plurality of fluid feed holes from the logic circuitry; and activation traces disposed between each of the plurality of fluid feed holes to couple the logic circuitry to the power circuitry. 2. The die of claim 1 , further including a common power trace and a common ground trace proximate to the logic circuitry to provide low-voltage power to the logic circuitry. 3. The die of claim 1 , further including a common power trace and a common ground trace proximate to the power circuitry to provide high-voltage power to the power circuitry. 4. The die of claim 1 , further including a plurality of address lines proximate to the logic circuitry on the first side. 5. The die of claim 1 , further including a crack detector trace disposed around an outer edge of a fluid feed hole, wherein the crack detector trace crosses the substrate between adjacent fluid feed holes and is disposed around an outer edge of the adjacent fluid feed hole. 6. The die of claim 5 , wherein the crack detector trace is disposed around substantially all of the plurality of fluid feed holes on the substrate. 7. The die of claim 1 , wherein each of the plurality of fluidic actuators is coupled to a flow channel, wherein the flow channel is fluidically coupled to all of the plurality of fluid feed holes. 8. The die of claim 1 , further including a thermal sensor disposed at each end of the die. 9. The die of claim 1 , further including a thermal sensor disposed at a substantially center point of the die. 10. A printhead comprising: a die including: a substrate having a fluid feed hole array along a first line parallel to a longitudinal axis of the die, the fluid feed hole array including a plurality of fluid feed holes formed through the substrate; a plurality of fluidic actuators along a second line parallel to the first line, wherein each fluidic actuator is configured to be enabled and energized; low-voltage control circuitry along a third line parallel to the first and second line; and an array of field-effect transistors (FETs) along a fourth line parallel to the first, second, and third lines, wherein the fourth line is on an opposite side of the first line from the third line. 11. The printhead of claim 10 , wherein the die includes a second plurality of fluidic actuators along a fifth line parallel to the first line, and on an opposite side of the first line from the second line. 12. The printhead of claim 10 , further including a polymeric mount holding the die, wherein the polymeric mount includes a slot disposed along a backside of the die to provide fluid to the fluid feed hole array. 13. The printhead of claim 10 , wherein the die includes a crack detector trace disposed around an outer edge of at least one of the plurality of fluid feed holes, wherein the crack detector trace crosses the substrate between adjacent ones of the plurality of fluid feed holes. 14. The printhead of claim 13 , wherein the crack detector trace is disposed around substantially all of the plurality of fluid feed holes on the substrate. 15. The printhead of claim 10 , wherein the die includes a thermal sensor disposed at each end of the die. 16. The printhead of claim 10 , wherein the die includes a thermal sensor disposed at a substantially center point of the die. 17. A method for forming a die for a printhead, comprising: etching a plurality of fluid feed holes in a substrate in a line parallel to a longitudinal axis of the substrate; depositing a plurality of layers on the substrate to form: along a first side of the plurality of fluid feed holes: logic power circuits along one edge of the substrate, including a common low-voltage power line and a common low-voltage ground line; address logic circuits, including address logic for selecting a fluidic actuator from a group of fluidic actuators in a plurality of fluidic actuators, the plurality of fluidic actuators proximate the plurality of fluid feed holes to eject fluid received from the plurality to fluid feed holes; address lines; and memory circuits, including a memory element for each group of fluidic actuators; and along a second side of the plurality of fluid feed holes opposite the first side: power bus circuits, including a common high-voltage power line and a common high-voltage ground line; and printing power circuits, including power circuitry to power thermal resistors for each of the plurality of fluidic actuators; and, from the first side to the second side, traces between the plurality of fluid feed holes to couple the address logic circuits to the printing power circuits. 18. The method of claim 17 , further including forming a plurality of thermal resistors disposed along each side of the plurality of fluid feed holes, and parallel to the plurality of fluid feed holes, wherein the plurality of thermal resistors is electrically coupled to the printing power circuits, and wherein the plurality of thermal resistors on one side of the plurality of fluid feed holes is staggered from the plurality of thermal resistors on an opposite side of the plurality of fluid feed holes. 19. The method of claim 17 , further including forming a plurality of thermal resistors disposed in a line along one side of the plurality of fluid feed holes, and parallel to the plurality of fluid feed holes, wherein the plurality of thermal resistors is electrically coupled to the printing power circuits, and wherein the plurality of thermal resistors includes larger thermal resistors alternating with smaller thermals resistors. 20. The method of claim 17 , including embedding the substrate in a polymeric mount, wherein the polymeric mount includes an open region disposed behind the substrate to feed fluid to the fluid feed holes.

Assignees

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Classifications

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What does patent US11413864B2 cover?
A die for a printhead is described herein. The die includes a number of fluid feed holes disposed in a line parallel to a longitudinal axis of the die, wherein the fluid feed holes are formed through a substrate of the die. A number of fluidic actuators are proximate to the fluid feed holes to eject fluid received from the plurality of fluid feed holes. The die includes logic circuitry to opera…
Who is the assignee on this patent?
Hewlett Packard Development Co
What technology area does this patent fall under?
Primary CPC classification B41J2/04543. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Aug 16 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).