Media management on power-up

Patent metadata

Field	Value
Publication number	US-11409446-B2
Application number	US-202017095386-A
Country	US
Kind code	B2
Filing date	Nov 11, 2020
Priority date	Nov 11, 2020
Publication date	Aug 9, 2022
Grant date	Aug 9, 2022

Abstract

A method includes detecting a power-up event associated with a memory sub-system comprising a plurality of blocks of memory cells having blocks of memory cells associated therewith, responsive to detecting the power-up event and prior to receipt of signaling indicative of a host initiation sequence, determining that a block of memory cells associated with a respective block among the plurality of blocks of memory cells is an open virtual block of memory cells, determining that the respective block associated with the open virtual block of memory cells exhibits greater than a threshold health characteristic value, and selectively performing a media management operation of a respective block of memory cells associated with the open virtual block of memory cells in response to the determination that the respective block exhibits greater than the threshold health characteristic value.

First claim

What is claimed is:

1. A method, comprising:
detecting an occurrence of a power-up event associated with a memory sub-system comprising a plurality of blocks of memory cells having blocks of virtual memory cells associated therewith;
responsive to detection of the occurrence of the power-up event and prior to a host utilizing an interface associated with the memory sub-system, determining that a block of memory cells associated with a respective block among the plurality of blocks of memory cells is an open virtual block of memory cells;
determining that the respective block associated with the open virtual block of memory cells exhibits greater than a threshold health characteristic value; and
selectively performing a media management operation on the respective block of memory cells associated with the open virtual block of memory cells in response to the determination that the respective block associated with the open virtual block of memory cells exhibits greater than the threshold health characteristic value.

2. The method of claim 1 , further comprising performing a block refresh of data stored in the respective block of memory cells associated with the open virtual block of memory cells.

3. The method of claim 2 , further comprising performing the block refresh prior to performing any host accesses of the plurality of blocks of memory cells.

4. The method of claim 1 , wherein determining that the respective block associated with the open virtual block of memory cells exhibits greater than a threshold health characteristic value further comprises determining a program-erase cycle (PEC) count of the respective block of memory cells associated with the open virtual block of memory cells.

5. The method of claim 4 , further comprising comparing the PEC count to a PEC threshold.

6. The method of claim 5 , wherein selectively performing the media management operation further comprises:
determining the PEC count is less than the PEC threshold; and
in response to determining the PEC count is less than the PEC threshold, refraining from performing the media management operation.

7. The method of claim 5 , wherein selectively performing the media management operation further comprises:
determining that the PEC count is greater than the PEC threshold; and
in response to determining that the PEC count is greater than the PEC threshold, performing the media management operation.

8. The method of claim 1 , wherein respective blocks of memory cells are grouped into a plurality of pages, and wherein some but not all pages have data stored in the pages.

9. The method of claim 8 , wherein the data is stored in at least a lower page of the plurality of pages.

10. An apparatus, comprising:
a media management on power-up component configured to:
detect initiation of a power-up event associated with a plurality of blocks of NAND memory cells;
responsive to detecting the power-up event and prior to a host utilizing an interface associated with plurality of blocks of NAND memory cells, select an open virtual block from a plurality of virtual blocks associated with respective blocks of the plurality of blocks of NAND memory cells;
determine a program-erase cycle (PEC) count of a respective block of NAND memory cells associated with the open virtual block;
compare the PEC count to a PEC threshold;
determine the PEC count is greater than the PEC threshold; and
based on the PEC count being greater than the PEC threshold, perform a media management operation involving at least one of the respective blocks of the plurality of NAND memory cells associated with the open virtual block.

11. The apparatus of claim 10 , wherein the media management on power-up component is further configured to perform the media management operation prior to completion of the power-up event.

12. The apparatus of claim 10 , wherein the media management on power-up component is further configured to identify a closed virtual block from the plurality of virtual blocks responsive to detection of the power-up event.

13. The apparatus of claim 12 , wherein the media management on power-up component is further configured to refrain from performance of a media management operation involving the closed virtual block.

14. The apparatus of claim 12 , wherein the media management on power-up component is further configured to perform a block refresh on the respective block of NAND memory cells associated with the open virtual block responsive to performing the media management operation on the open virtual block.

15. A system, comprising:
a memory sub-system comprising a plurality of memory components arranged to form a stackable cross-gridded array of a plurality of blocks of interleaved NAND memory cells; and
a processing device coupled to the plurality of memory components, the processing device to perform operations comprising:
detecting initiation of a power-up event associated with the plurality of blocks of interleaved NAND memory cells;
responsive to detecting the power-up event and prior to a host utilizing an interface associated with the memory sub-system, selecting an open virtual block from a plurality of virtual blocks associated with respective blocks of NAND memory cells of the plurality of blocks of NAND memory cells;
determine a program-erase cycle (PEC) count of a respective block of NAND memory cells associated with the open virtual block;
determine the PEC count is greater than a PEC threshold;
based on the PEC count being greater than the PEC threshold, performing a media management operation on the respective block of NAND memory cells associated with the open virtual block; and
based on performing a media management operation on the respective block of NAND memory cells associated with the open virtual block, performing a block refresh of the respective block of NAND memory cells associated with the open virtual block.

16. The system of claim 15 , further comprising determining that the virtual block of memory cells is the open virtual block of memory cells by determining that a lower page associated with the virtual block is programmed and an upper page associated with the virtual block of memory cells is an open page.

17. The system of claim 15 , wherein the PEC threshold is equal to 500, 1000, 1500, 2000, 3000, 4000, or 5000 program-erase cycles.

18. The system of claim 15 , wherein performing the media management operation further comprises performing a read operation on the respective block of NAND memory cells associated with the open virtual block.

19. The system of claim 18 , further comprises determining a threshold voltage (V T ) level of the respective block of NAND memory cells associated with the open virtual block by performing the read operation.

20. The system of claim 19 , further comprising:
determining the V T level of the respective block of NAND memory cells is less than a voltage threshold; and
based on determining the V T level of the respective block of NAND memory cells is less than the voltage threshold, performing the block refresh on the respective block of NAND memory cells associated with the open virtual block.

Assignees

• Micron Technology Inc
• Micro Tech Inc

Inventors

• Liu Tao
• Luo Xiangang

Classifications

• G11C16/3495

  Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically · CPC title

• G11C16/20

  Initialising; Data preset; Chip identification · CPC title

• G11C16/0483

  comprising cells having several storage transistors connected in series · CPC title

• G11C7/20

  Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory · CPC title

• G11C5/148

  Details of power up or power down circuits, standby circuits or recovery circuits · CPC title