Package with lead frame with improved lead design for discrete electrical components and manufacturing the same

Patent metadata

Field	Value
Publication number	US-11404355-B2
Application number	US-202016945641-A
Country	US
Kind code	B2
Filing date	Jul 31, 2020
Priority date	Sep 22, 2017
Publication date	Aug 2, 2022
Grant date	Aug 2, 2022

Abstract

A semiconductor package includes a lead frame, a die, a discrete electrical component, and electrical connections. The lead frame includes leads and a die pad. Some of the leads include engraved regions that have recesses therein and the die pad may include an engraved region or multiple engraved regions. Each engraved region is formed to contain and confine a conductive adhesive from flowing over the edges of the engraved leads or the die pad. The boundary confines the conductive adhesive to the appropriate location on the engraved lead or the engraved die pad when being placed on the engraved regions. By utilizing a lead frame with engraved regions, the flow of the conductive adhesive or the wettability of the conductive adhesive can be contained and confined to the appropriate areas of the engraved lead or engraved die pad such that a conductive adhesive does not cause cross-talk between electrical components within a semiconductor package or short circuiting within a semiconductor package.

First claim

The invention claimed is:

1. A method of forming a semiconductor package, comprising:
forming a first conductive material on a first side of a leadframe at selected locations, the leadframe having a second side opposite the first side;
forming a first recess in a first engraved region of the leadframe, the first engraved region including a first bonding surface adjacent to the first recess;
forming a second recess in a second engraved region of the leadframe, the second engraved region including a second bonding surface adjacent to the second recess;
coupling a first end of a discrete electrical component to the first bonding surface and a second end of the discrete electrical component to the second bonding surface;
coupling a die spaced apart from the second recess to the second side of the leadframe;
forming an electrical connection between the leadframe and the die;
forming a molding compound on the first side of the leadframe covering the discrete electrical component, the die, and the electrical connection; and
forming a die pad and a lead by removing portions from the second side of the leadframe, forming the die pad and the lead including:
forming the lead to include the first recess and the first bonding surface adjacent to the first recess; and
forming the die pad to include the second recess and the second bonding surface adjacent to the second recess and to be coupled to the die.

2. The method of forming the semiconductor package of claim 1 , further comprising:
forming a conductive adhesive on the first bonding surface and on the second bonding surface, coupling the first end of the discrete electrical component to the conductive adhesive on the first bonding surface and coupling the second end of the discrete electrical component to the conductive adhesive on the second bonding surface.

3. The method of forming the semiconductor package of claim 1 , wherein coupling the die to the leadframe includes coupling the die to a die attach region of the leadframe by a die attach film.

4. The method of forming the semiconductor package of claim 1 , wherein removing portions form the second side of the leadframe includes etching portions of the second side of the leadframe.

5. The method of forming the semiconductor package of claim 4 , wherein the etching portions of the second side of the leadframe is a chemical etching.

6. The method of forming the semiconductor package of claim 1 , wherein forming the first conductive material further comprising:
forming a third recess in the first side of the leadframe between the first engraved region and the second engraved region.

7. The method of forming the semiconductor package of claim 1 , wherein the first conductive material is a selectively chemically resistant conductive material.

8. The method of forming the semiconductor package of claim 1 , further comprising:
coupling a support to the second side of the leadframe; and
removing the support from the second side of the leadframe.

9. A method, comprising:
forming a first conductive layer at a first selected location and at second selected locations on a first side of a leadframe;
forming a plurality of first recesses in a second side of the leadframe;
forming a plurality of second recesses in the second side of the leadframe, the second recesses being smaller than the first recesses;
coupling a die to the second side of the leadframe;
coupling ends of a plurality of electrical components to the second side of the leadframe including aligning the ends with edges of the plurality of second recesses;
forming a molding compound on the second side of the leadframe covering the die and the plurality of electrical components; and
forming a plurality of third recesses in the first side of the leadframe separating a plurality of leads and a die pad.

10. The method of claim 9 , wherein coupling the ends of the plurality of electrical components to the second side of the leadframe further comprises:
coupling an adhesive to the second side of the leadframe to surfaces surrounded by the plurality of second recesses; and
placing the ends of the plurality of electrical components on the adhesive coupling the ends of the plurality of electrical components to the surfaces surrounded by the plurality of second recesses.

11. The method of claim 9 , wherein forming the plurality of second recesses further comprises forming a first plateau on the die pad and a second plateau on a first one of the plurality of leads; and
coupling the ends of at least one of the plurality of electrical components to the first plateau and the second plateau.

12. The method of claim 9 , wherein forming the plurality of third recesses further comprises aligning one of the plurality of third recesses with at one of the plurality of electrical components extending between the die pad and one of the plurality of leads.

13. The method of claim 9 , wherein coupling the ends of the plurality of electrical components to the second side of the leadframe further comprises:
placing a first number of the plurality of electrical components to extend between the die pad and the plurality of leads; and
placing a second number of the plurality of electrical components to extend between respective leads of the plurality of leads.

14. The method of claim 9 , forming a plurality of electrical wires having first ends coupled to the die pad and second ends coupled to the plurality of leads.

15. The method of claim 9 , wherein coupling the die to the second side of the leadframe further comprises coupling the die to a surface of the leadframe laterally adjacent to one of the plurality of second recesses in the second side of the leadframe.

16. A method, comprising:
forming a plurality of first conductive layers at a plurality of first selected locations on a first side of a leadframe;
forming a plurality of second conductive layers at a plurality of second selected locations on the first side of the leadframe;
forming a plurality of first recesses in a second side of the leadframe opposite to the first side of the leadframe;
forming a plurality of second recesses in the second side of the leadframe forming a plurality of plateaus, each second recess of the plurality of second recesses surrounding each plateau of the plurality of plateaus;
coupling a plurality of die to the second side of the leadframe including aligning each die of the plurality of die with one of the plurality of second conductive layers;
coupling ends of a plurality of electrical components to the plurality of plateaus including coupling each end of each electrical component to one of the plurality of plateaus;
forming a molding compound on the second side of the leadframe covering the plurality of die and the plurality of electrical components; and
forming a plurality of third recesses in the first side of the leadframe forming a plurality of leads and a plurality of die pads.

17. The method of claim 16 , further comprising forming a plurality of electrical wires that extend from the plurality of die to the plurality of leads.

18. The method of claim 16 , further comprising singulating the molding compound, the plurality of electrical components, the plurality of die pads, and the plurality of leads at locations aligned with some of the plurality of third recesses forming a plurality of packages.

19. The method of claim 16 , further comprising coupling a plurality of adhesive portions to each of the plurality of plateaus.

20. The method of claim 19 , wherein

Assignees

• St Microelectronics Pte Ltd
• St Microelectronics Inc

Inventors

• Rodriguez Rennier
• Bacquian Bryan Christian
• Maming Maiden Grace
• Gani David

Classifications

• H10W72/552

  comprising metals or metalloids, e.g. silver · CPC title

• H10W72/5522

  comprising gold [Au] · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W72/075

  of bond wires · CPC title