Array substrate, display panel and display apparatus containing the same, and method for driving the same
US-2017053608-A1 · Feb 23, 2017 · US
US11397348B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11397348-B2 |
| Application number | US-201816300255-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 21, 2018 |
| Priority date | May 23, 2017 |
| Publication date | Jul 26, 2022 |
| Grant date | Jul 26, 2022 |
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The disclosure discloses an array substrate, a method for fabricating the same, a liquid crystal display panel, and a display device, where the array substrate includes: a base substrate; a convex component located on the base substrate; a reflection layer overlying the convex component; a thin film transistor located above a film layer at which the reflection layer is located; a pixel electrode located above a film layer at which the thin film transistor is located; and a planarization layer located between the pixel electrode and the reflection layer.
Opening claim text (preview).
The invention claimed is: 1. An array substrate, comprising: a base substrate; a convex component located on the base substrate; a reflection layer overlying the convex component; a thin film transistor located above the reflection layer; a pixel electrode located above the thin film transistor; and a planarization layer located between the pixel electrode and the reflection layer; wherein the convex component comprises a plurality of layers of sub-convex component arranged in a stack, an orthographic projection, of a first layer of sub-convex component, on the base substrate, covers an orthographic projection, of a second layer of sub-convex component, on the base substrate, the first layer is in direct contact with the base substrate, and the second layer is any layer of the plurality of layers of sub-convex component except the first layer; wherein the planarization layer comprises a gate insulation layer of the thin film transistor. 2. The array substrate according to claim 1 , wherein the thin film transistor is a thin film transistor with a bottom gate. 3. The array substrate according to claim 2 , wherein an orthographic projection of the reflection layer onto the base substrate overlaps with an orthographic projection of the pixel electrode onto the base substrate. 4. The array substrate according to claim 1 , wherein an orthographic projection of the convex component onto the base substrate does not overlap with an orthographic projection of the thin film transistor onto the base substrate. 5. The array substrate according to claim 1 , wherein a material of the convex component is a resin or a silicon nitride. 6. The array substrate according to claim 1 , wherein the array substrate further comprises a base layer located between the convex component and the base substrate. 7. The array substrate according to claim 1 , wherein the planarization layer further comprises a first insulation layer located between the thin film transistor and the reflection layer. 8. The array substrate according to claim 7 , wherein a material of the gate insulation layer is same as a material of the first insulation layer. 9. The array substrate according to claim 1 , wherein a height of the convex component ranges from 3000 to 4000 angstroms. 10. The array substrate according to claim 6 , wherein a material of the base layer is same as a material of the convex component. 11. A liquid crystal display panel, comprising an array substrate; wherein the array substrate comprises: a base substrate; a convex component located on the base substrate; a reflection layer overlying the convex component; a thin film transistor located above the reflection layer; a pixel electrode located above the thin film transistor; and a planarization layer located between the pixel electrode and the reflection layer; wherein the convex component comprises a plurality of layers of sub-convex component arranged in a stack, an orthographic projection, of a first layer of sub-convex component, on the base substrate, covers an orthographic projection, of a second layer of sub-convex component, on the base substrate, the first layer is in direct contact with the base substrate, and the second layer is any layer of the plurality of layers of sub-convex component except the first layer; wherein the planarization layer comprises a gate insulation layer of the thin film transistor. 12. A display device, comprising the liquid crystal display panel according to claim 11 . 13. The liquid crystal display panel according to claim 11 , wherein the thin film transistor is a thin film transistor with a bottom gate; and an orthographic projection of the reflection layer onto the base substrate overlaps with an orthographic projection of the pixel electrode onto the base substrate. 14. The liquid crystal display panel according to claim 11 , wherein an orthographic projection of the convex component onto the base substrate does not overlap with an orthographic projection of the thin film transistor onto the base substrate. 15. The liquid crystal display panel according to claim 11 , wherein a height of the convex component ranges from 3000 to 4000 angstroms. 16. The liquid crystal display panel according to claim 11 , wherein the array substrate further comprises a base layer located between the convex component and the base substrate. 17. The liquid crystal display panel according to claim 16 , wherein a material of the base layer is same as a material of the convex component.
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