Display Substrate, Manufacturing Method Thereof, and Display Device

Patent metadata

Field	Value
Publication number	US-2016358948-A1
Application number	US-201514787627-A
Country	US
Kind code	A1
Filing date	Jun 19, 2015
Priority date	Dec 23, 2014
Publication date	Dec 8, 2016
Grant date	—

Abstract

A display substrate, a manufacturing method thereof, and a display device are disclosed. The display substrate includes a display region and a peripheral region, a display device including the display substrate further includes a gate driving circuit, the gate driving circuit includes a capacitor (C), the capacitor (C) includes a first electrode and a second electrode with an electrical insulation layer provided therebetween. The first electrode and the second electrode are remaining portions of films for forming conductive layers in the display region left in the peripheral region, and the electrical insulation layer is a remaining portion of a film for forming an insulation layer in the display region left in the peripheral region.

First claim

1 . A display substrate comprising a display region, a peripheral region, and a gate driving circuit, wherein:
the gate driving circuit comprises a capacitor in the peripheral region, the capacitor comprises a first electrode and a second electrode with an electrical insulation layer provided therebetween, the display region is provided with an insulation layer and conductive layers therein, the first electrode and the second electrode are remaining portions of films for forming the conductive layers left in the peripheral region, and the electrical insulation layer is a remaining portion of a film for forming the insulation layer left in the peripheral region.

2 . The display substrate according to claim 1 , wherein the display substrate is an array substrate or a color filter substrate.

3 . The display substrate according to claim 2 , wherein the gate driving circuit is provided on the array substrate.

4 . The display substrate according to claim 2 , wherein:
in the display region, a first metal layer, a gate insulation layer, a second metal layer, a buffer layer, a resin layer, a first electrode layer, a passivation layer and a second electrode layer are sequentially provided, or in the display region, the first metal layer, the gate insulation layer, the second metal layer, the buffer layer, the first electrode layer, the passivation layer and the second electrode layer are sequentially provided; a remaining portion of a film for forming the first metal layer left in the peripheral region is a first metal layer remaining portion; a remaining portion of a film for forming the gate insulation layer left in the peripheral region is a gate insulation layer remaining portion; a remaining portion of a film for forming the second metal layer left in the peripheral region is a second metal layer remaining portion; a remaining portion of a film for forming the buffer layer left in the peripheral region is a buffer layer remaining portion; a remaining portion of a film for forming the resin layer left in the peripheral region is a resin layer remaining portion; a remaining portion of a film for forming the first electrode layer left in the peripheral region is a first electrode layer remaining portion; a remaining portion of a film for forming the passivation layer left in the peripheral region is a passivation layer remaining portion; and a remaining portion of a film for forming the second electrode layer left in the peripheral region is a second electrode layer remaining portion; wherein one of the first metal layer and the second layer is a gate metal layer, and the other one is a source/drain metal layer, and one of the first electrode layer and the second electrode layer is a pixel electrode layer, and the other one is a common electrode layer.

5 . The display substrate according to claim 4 , wherein:
the first electrode or the second electrode comprises a transparent conductive layer and a light shielding conductive layer, or each of the first electrode and the second electrode comprises the transparent conductive layer and the light shielding conductive layer; the transparent conductive layer is the first electrode layer remaining portion or the second electrode layer remaining portion; the light shielding conductive layer is the first metal layer remaining portion or the second metal layer remaining portion.

6 . The display substrate according to claim 5 , wherein:
the transparent conductive layer and the light shielding conductive layer are electrically connected through a via hole.

7 . The display substrate according to claim 5 , wherein the first electrode or the second electrode comprises the transparent conductive layer and the light shielding conductive layer.

8 . The display substrate according to claim 4 , wherein the first metal layer remaining portion, the gate insulation layer remaining portion, the second metal layer remaining portion, the buffer layer remaining portion and the first electrode layer remaining portion are sequentially provided in a region where the capacitor is located, and a first via hole penetrating through the buffer layer remaining portion and the gate insulation layer remaining portion is further provided in the region where the capacitor is located, and the first electrode layer remaining portion is electrically connected with the first metal layer remaining portion through the first via hole;
there is an overlapped region between the second metal layer remaining portion and the first metal layer remaining portion, and there is an overlapped region between the second metal layer remaining portion and the first electrode layer remaining portion; the first electrode comprises the first metal layer remaining portion and the first electrode layer remaining portion, and the second electrode comprises the second metal layer remaining portion.

9 . The display substrate according to claim 2 , wherein:
the first metal layer, the gate insulation layer, the second metal layer, the passivation layer and the pixel electrode layer are sequentially provided in the display region; a remaining portion of a film for forming the first metal layer left in the peripheral region comprises a first metal layer remaining portion; a remaining portion of a film for forming the gate insulation layer left in the peripheral region comprises a gate insulation layer remaining portion; a remaining portion in the peripheral region a film for forming the second metal layer comprises a second metal layer remaining portion; a remaining portion of a film for forming the passivation layer left in the peripheral region comprises a passivation layer remaining portion; and a remaining portion of a film for forming the pixel electrode layer left in the peripheral region comprises a pixel electrode layer remaining portion; wherein the first metal layer is a gate metal layer, and the second metal layer is a source/drain metal layer; or the first metal layer is the source/drain metal layer and the second metal layer is the gate metal layer.

10 . The display substrate according to claim 9 , wherein:
the first electrode or the second electrode comprises a transparent conductive layer and a light shielding conductive layer; the transparent conductive layer comprises the pixel electrode layer remaining portion; and the light shielding conductive layer comprises the first metal layer remaining portion or the second metal layer remaining portion.

11 . The display substrate according to claim 4 , wherein the first metal layer remaining portion, the gate insulation layer remaining portion, the second metal layer remaining portion, the passivation layer remaining portion and the pixel electrode layer remaining portion are sequentially provided in a region where the capacitor is located, a second via hole penetrating through the passivation layer remaining portion and the gate insulation layer remaining portion is further provided in the region where the capacitor is located, the pixel electrode layer remaining portion is electrically connected with the first metal layer remaining portion through the second via hole;
there is an overlapped region between the second metal layer remaining portion and the first metal layer remaining portion, and there is an overlapped region between the second metal layer remaining portion and the pixel electrode layer remaining portion; the first electrode comprises the second metal layer remaining portion, and the second electrode comprises the first metal layer remaining portion and the pixel electrode layer remaining portion.

12 . (canceled)

13 . The display substrate according to claim 4 , wher

Assignees

• Boe Technology Group Co Ltd
• Beijing Boe Optoelectronics Tech Co Ltd

Inventors

• Wang Shijun
• Jiang Wenbo
• Lv Zhenhua
• Bao Zhiying

Classifications

• G09G5/003

  Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto (specific for a CRT G09G1/165; for a flat panel G09G3/2092) · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/0212

  comprising manufacture, treatment or coating of substrates · CPC title

• H10D30/6723

  having light shields · CPC title

• H10D86/481 Primary

  integrated with passive devices, e.g. auxiliary capacitors · CPC title