Methods of monitoring conditions associated with aging of silicon carbide power MOSFET devices in-situ, related circuits and computer program products

Patent metadata

Field	Value
Publication number	US-11397209-B2
Application number	US-202016897448-A
Country	US
Kind code	B2
Filing date	Jun 10, 2020
Priority date	Jun 18, 2019
Publication date	Jul 26, 2022
Grant date	Jul 26, 2022

Abstract

A method of monitoring a condition of a SiC MOSFET can include (a) applying a first test gate-source voltage across a gate-source of a SiC MOSFET in-situ, the first test gate-source voltage configured to operate the SiC MOSFET in saturation mode to generate a first drain current in the SiC MOSFET, (b) applying a second test gate-source voltage across the gate-source of the SiC MOSFET in-situ, the second test gate-source voltage configured to operate the SiC MOSFET in fully-on mode to generate a second drain current in the SiC MOSFET, (c) determining a drain-source saturation resistance using the first drain current to provide an indication of a degradation of a gate oxide of the SiC MOSFET; and (d) determining a drain-source on resistance using the second drain current to provide an indication of a degradation of contact resistance of the SiC MOSFET.

First claim

What is claimed:

1. A method of monitoring a condition of a SiC MOSFET, the method comprising:
(a) applying a first voltage across a gate-source of a SiC MOSFET in-situ that is greater than a specified threshold voltage for the SiC MOSFET to conduct a current though a channel region in the SiC MOSFET;
(b) determining whether the current exceeds a target current that is pre-selected to monitor a drain-source saturation mode resistance of the SiC MOSFET in-situ;
(c) increasing the first voltage by an increment and iteratively performing (a) and (b) until the current exceeds the target current whereupon the first voltage is designated as a test gate-source voltage to be used in monitoring the drain-source saturation mode resistance of the SiC MOSFET in-situ; and then
detecting a power-on event associated with operation of the SiC MOSFET in-situ for an application that provides an in-situ drain-source voltage across the SiC MOSFET in-situ;
applying the test gate-source voltage across the gate-source of the SiC MOSFET;
determining a drain current conducted though the channel region in the SiC MOSFET responsive to applying the test gate-source voltage; and
determining the drain-source saturation mode resistance for the SiC MOSFET based on the drain current and the in-situ drain-source voltage.

2. The method according to claim 1 wherein the target current is preselected so that the in-situ drain-source voltage across the SiC MOSFET in-situ provides the target current into a drain of the SiC MOSFET in saturation mode.

3. The method according to claim 1 wherein the target current is preselected so that a change in the drain-source saturation mode resistance is measurable at sufficient resolution over aging of the SiC MOSFET in-situ.

4. The method according to claim 1 wherein the target current is preselected so as to decrease by at least about 30% responsive to the test gate-source voltage and the in-situ drain-source voltage during aging of the SiC MOSFET in-situ.

5. The method of claim 1 wherein applying the test gate-source voltage further comprises applying a test gate-source voltage pulse across the gate-source having a duration including a transient time interval followed by a measurement time interval.

6. The method of claim 5 wherein the duration of the test gate-source voltage pulse is limited to avoid test related aging of the SiC MOSFET due to heating.

7. The method of claim 1 wherein the in-situ drain-source voltage is provided upon completion of the power-on event by a circuit in which the SiC MOSFET is in-situ.

8. The method of claim 1 wherein the test gate-source voltage is provided by a circuit coupled to a gate of the SiC MOSFET.

9. The method of claim 1 wherein the SiC MOSFET is in-situ in a phase-leg based power converter circuit including a shunt resistor coupled in series with a source of the SiC MOSFET, the shunt resistor used to measure the drain current.

10. The method of claim 1 wherein the SiC MOSFET is in-situ in a circuit including a current sensor coupled in series with the drain of the SiC MOSFET in series with an inductive load.

Assignees

• Univ Texas

Inventors

• Akin Bilal
• Pu Shi
• Ugur Enes
• Yang Fei
• Xu Chi
• Vankayalapati Bhanu Teja

Classifications

• G01R31/2644

  Adaptations of individual semiconductor devices to facilitate the testing thereof · CPC title

• G01R31/2621 Primary

  for testing field effect transistors, i.e. FET's · CPC title

• G01R31/2642 Primary

  Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests · CPC title