Methods and apparatus for integrated selective monolayer doping

Patent metadata

Field	Value
Publication number	US-11373871-B2
Application number	US-201916577353-A
Country	US
Kind code	B2
Filing date	Sep 20, 2019
Priority date	Nov 21, 2018
Publication date	Jun 28, 2022
Grant date	Jun 28, 2022

Abstract

Methods and apparatus for forming doped material layers in semiconductor devices using an integrated selective monolayer doping (SMLD) process. A concentration of dopant is deposited on a material layer using the SMLD process and the concentration of dopant is then annealed to diffuse the concentration of dopant into the material layer. The SMLD process conforms the concentration of dopant to a surface of the material layer and may be performed in a single CVD chamber. The SMLD process may also be repeated to further alter the diffusion parameters of the dopant into the material layer. The SMLD process is compatible with p-type dopant species and n-type dopant species.

First claim

The invention claimed is:

1. A method for forming a doped semiconductor feature on a substrate having a first material with non-dielectric properties and a second material with dielectric properties, comprising:
soaking the substrate with a gas containing concentrations of a dopant, the gas selectively forming a monolayer of the dopant on a first surface of the first material but not on a second surface of the second material;
annealing the substrate to diffuse the dopant into the first material; and
repeating the method while altering a gas soak duration, a gas soak pressure, a gas soak flow rate, or a gas soak dopant concentration in at least one cycle to alter an amount of dopant on the first surface of the first material.

2. The method of claim 1 , further comprising:
varying a gas soak duration, a gas soak pressure, a gas soak flow rate, or a gas soak dopant concentration to control dopant diffusion parameters.

3. The method of claim 1 , further comprising:
conforming concentrations of dopant to the first surface of the first material.

4. The method of claim 1 , wherein the method is performed in a single semiconductor processing chamber.

5. The method of claim 1 , further comprising:
altering a temperature of an anneal to change a depth of penetration of the dopant into the first material.

6. The method of claim 5 , further comprising:
altering a duration of a deposition of the dopant to increase an amount of active dopant in the concentrations of the dopant.

7. The method of claim 1 , further comprising:
depositing concentrations of dopant that include a p-type dopant species.

8. The method of claim 7 , wherein the p-type dopant species includes boron or gallium.

9. The method of claim 1 , further comprising:
depositing concentrations of dopant that include an n-type dopant species.

10. The method of claim 9 , wherein the n-type dopant species includes arsenic or phosphorus.

11. The method of claim 1 , further comprising:
pre-cleaning the first surface of the first material before depositing concentrations of dopant.

12. The method of claim 1 , further comprising:
integrating the method in a formation of a source/drain of a semiconductor structure.

13. A method for forming a doped semiconductor feature on a substrate having a first material with non-dielectric properties and a second material with dielectric properties, comprising:
soaking the substrate with a gas containing concentrations of a dopant, the gas selectively forming a monolayer of the dopant on a first surface of the first material but not on a second surface of the second material;
annealing the substrate to diffuse the dopant into the first material; and
repeating the method while altering a temperature of an anneal in at least one cycle to change a depth of penetration of the dopant into the first material.

14. The method of claim 13 , further comprising:
varying a gas soak duration, a gas soak pressure, a gas soak flow rate, or a gas soak dopant concentration to control dopant diffusion parameters.

15. A method for forming a doped semiconductor feature on a substrate having a first material with non-dielectric properties and a second material with dielectric properties, comprising:
soaking the substrate with a gas containing concentrations of a dopant, the gas selectively forming a monolayer of the dopant on a first surface of the first material but not on a second surface of the second material;
annealing the substrate to diffuse the dopant into the first material; and
repeating the method while altering a gas soak duration, a gas soak pressure, a gas soak flow rate, or a gas soak dopant concentration in at least one cycle to alter an amount of dopant on the first surface of the first material and repeating the method while altering a temperature of an anneal in at least one cycle to change a depth of penetration of the dopant into the first material.

Assignees

• Applied Materials Inc

Inventors

• Colombeau Benjamin
• Aderhold Wolfgang R
• Lo Andy
• Huang Yi-Chiau

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P70/20

  Cleaning during device manufacture · CPC title

• H10P32/1408

  from or through or into an external applied layer, e.g. photoresist or nitride layers · CPC title

• H10P32/171 Primary

  being group IV material · CPC title

• H10D30/605

  having significant overlap between the lightly-doped extensions and the gate electrode · CPC title