Fabricating a silicon carbide and nitride structures on a carrier substrate

US11361964B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11361964-B2
Application numberUS-202016874588-A
CountryUS
Kind codeB2
Filing dateMay 14, 2020
Priority dateMay 14, 2020
Publication dateJun 14, 2022
Grant dateJun 14, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

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A method, apparatus, and system for forming a semiconductor structure. A first oxide layer located on a set of group III nitride layers formed on a silicon carbide substrate is bonded to a second oxide layer located on a carrier substrate to form an oxide layer located between the carrier substrate and the set of group III nitride layers. The silicon carbide substrate has a doped layer. The silicon carbide substrate having the doped layer is etched using a photo-electrochemical etching process, wherein a doping level of the doped layer is such that the doped layer is removed and a silicon carbide layer in the silicon carbide substrate remains unetched. The semiconductor structure is formed using the silicon carbide layer and the set of group III nitride layers.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for forming a semiconductor structure, the method comprising: forming a set of group III nitride layers on a silicon carbide substrate, wherein the silicon carbide substrate includes a doped layer and wherein the doped layer has a doping level such that the doped layer is etched using a photo-electrochemical etching process while other portions of the silicon carbide substrate remain unetched; forming a first oxide layer on the set of group III nitride layers, wherein the set of group III nitride layers is located between the first oxide layer and the silicon carbide substrate; bonding the first oxide layer to a second oxide layer on a carrier substrate to form an oxide layer located between the carrier substrate and the set of group III nitride layers; grinding the silicon carbide substrate; stopping the grinding when a part of the doped layer in the silicon carbide substrate is reached; etching the silicon carbide substrate using the photo-electrochemical etching process such that the doped layer is removed and a silicon carbide device layer in the silicon carbide substrate remains when the part of the doped layer in the silicon carbide substrate is exposed; and forming the semiconductor structure using the silicon carbide device layer and the set of group III nitride layers. 2. The method of claim 1 , wherein bonding the first oxide layer to the second oxide layer on the carrier substrate to form the oxide layer located between the carrier substrate and the set of group III nitride layers is performed after etching the silicon carbide substrate. 3. The method of claim 1 , wherein bonding the first oxide layer to the second oxide layer on the carrier substrate to form the oxide layer located between the carrier substrate and the set of group III nitride layers is performed after etching a group III nitride layer in the set of group III nitride layers. 4. The method of claim 1 , wherein bonding the first oxide layer to the second oxide layer on the carrier substrate to form the oxide layer located between the carrier substrate and the set of group III nitride layers is performed prior to etching the silicon carbide substrate. 5. The method of claim 1 , wherein bonding the first oxide layer to the second oxide layer on the carrier substrate to form the oxide layer located between the carrier substrate and the set of group III nitride layers comprises: contacting a first surface of the first oxide layer to a second surface of the second oxide layer, wherein intermolecular interactions occur between the first oxide layer and the second oxide layer; and annealing the first oxide layer and the second oxide layer while the first surface is in direct contact with the second surface to form the oxide layer located between the carrier substrate and the set of group III nitride layers. 6. The method of claim 1 , wherein etching the silicon carbide substrate using the photo-electrochemical etching process such that the doped layer is removed and the silicon carbide device layer in the silicon carbide substrate remains when the part of the doped layer in the silicon carbide substrate is exposed comprises: etching one of a silicon-face and a carbon-face of the silicon carbide substrate using the photo-electrochemical etching process such that the doped layer is removed and the silicon carbide device layer in the silicon carbide substrate remains when the part of the doped layer in the silicon carbide substrate is exposed. 7. The method of claim 1 , wherein the doped layer is a sacrificial layer enabling forming the silicon carbide device layer on a wafer with at least one of a desired uniformity in a thickness of the silicon carbide device layer or a desired level of optical performance. 8. The method of claim 1 , wherein the semiconductor structure is selected from at least one of an optical waveguide, a slot waveguide, a ridge waveguide, a rib waveguide, a buried optical waveguide, a suspended waveguide, an optical resonator, or a photon emitting quantum memory using a point defect within the silicon carbide device layer. 9. The method of claim 1 , wherein the silicon carbide device layer and the set of group III nitride layers are thin-film layers. 10. The method of claim 1 , wherein the carrier substrate is one of a silicon carbide substrate, a silicon substrate, an aluminum oxide substrate, a gallium oxide substrate, a silica substrate, an aluminum nitride substrate, and a gallium nitride substrate. 11. The method of claim 1 , wherein the set of group III nitride layers comprises at least one of gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), and indium aluminum gallium nitride (InAlGaN). 12. A method for forming a semiconductor structure, the method comprising: bonding a first oxide layer located on a set of group III nitride layers formed on a silicon carbide substrate to a second oxide layer located on a carrier substrate to form an oxide layer located between the carrier substrate and the set of group III nitride layers, wherein the silicon carbide substrate has a doped layer; etching the silicon carbide substrate having the doped layer using a photo-electrochemical etching process, wherein a doping level of the doped layer is such that the doped layer is removed and a silicon carbide device layer in the silicon carbide substrate remains unetched; and forming the semiconductor structure using the silicon carbide device layer and the set of group III nitride layers. 13. The method of claim 12 further comprising: grinding the silicon carbide substrate prior to etching the silicon carbide substrate; and stopping the grinding of the silicon carbide substrate when a part of the doped layer in the silicon carbide substrate is reached prior to etching the silicon carbide substrate. 14. The method of claim 12 further comprising: forming the set of group III nitride layers on the silicon carbide substrate; and forming the first oxide layer on the set of group III nitride layers, wherein the set of group III nitride layers is located between the first oxide layer and the silicon carbide substrate. 15. The method of claim 12 , wherein bonding the first oxide layer located on the set of group III nitride layers formed on the silicon carbide substrate to the second oxide layer located on the carrier substrate to form the oxide layer located between the carrier substrate and the set of group III nitride layers is performed after etching the silicon carbide substrate. 16. The method of claim 12 , wherein bonding the first oxide layer to the second oxide layer on the carrier substrate to form the oxide layer located between the carrier substrate and the set of group III nitride layers is performed after etching a group III nitride layer in the set of group III nitride layers. 17. The method of claim 12 , wherein bonding the first oxide layer located on the set of group III nitride layers formed on the silicon carbide substrate to the second oxide layer located on the carrier substrate to form the oxide layer located between the carrier substrate and the set of group III nitride layers is performed prior to etching the silicon carbide substrate. 18. The method of claim 12 , wherein bonding the first oxide layer located on the set of group III nitride layers formed on the silicon carbide substrate to the second oxide layer located on the carrier substrate to form the oxide layer located between the carrier substrate and the set of group III nitride layers comprises: contacting a first surface of the first oxide

Assignees

Inventors

Classifications

  • by grinding or lapping · CPC title

  • Etching of wafers, substrates or parts of devices · CPC title

  • Nitrides · CPC title

  • Silicon carbide · CPC title

  • Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers · CPC title

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What does patent US11361964B2 cover?
A method, apparatus, and system for forming a semiconductor structure. A first oxide layer located on a set of group III nitride layers formed on a silicon carbide substrate is bonded to a second oxide layer located on a carrier substrate to form an oxide layer located between the carrier substrate and the set of group III nitride layers. The silicon carbide substrate has a doped layer. The sil…
Who is the assignee on this patent?
Boeing Co
What technology area does this patent fall under?
Primary CPC classification H10P14/2904. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 14 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).