Phase locked loop circuit

Patent metadata

Field	Value
Publication number	US-11356104-B2
Application number	US-202117351300-A
Country	US
Kind code	B2
Filing date	Jun 18, 2021
Priority date	Jul 1, 2020
Publication date	Jun 7, 2022
Grant date	Jun 7, 2022

Abstract

A phase locked loop circuit includes a phase comparator that compares phases of a reference signal through a first frequency divider and a local signal through a second frequency divider to output a phase comparison signal; a loop filter that smooths the phase comparison signal to output the control voltage signal; a controller that sets frequency division ratios of the first and the second frequency dividers; a free-running voltage generator that generates a free-running voltage signal of the voltage control oscillator; a measurement circuit that measures a voltage of the control voltage signal; a storage circuit that stores therein the voltage of the control voltage signal; and a low-pass filter that transmits, to the voltage control oscillator, a corrected free-running voltage signal based on a free-running voltage correction value calculated by the free-running voltage generator based on the control voltage signal before the frequency division ratios are changed.

First claim

What is claimed is:

1. A phase locked loop circuit comprising:
a phase comparator configured to compare a phase of a reference signal and a phase of a local signal, the reference signal being obtained by dividing, by a first frequency divider, a signal of a reference frequency oscillated by a reference oscillator, the local signal being obtained by dividing, by a second frequency divider, a signal of a local frequency oscillated by a voltage control oscillator based on a control voltage signal, and to output a phase comparison signal corresponding to a phase difference therebetween;
a loop filter configured to smooth the phase comparison signal and to output the control voltage signal;
a free-running voltage generator configured to generate a free-running voltage signal of the voltage control oscillator;
a measurement circuit configured to measure a voltage of the control voltage signal;
a storage circuit configured to store therein the voltage of the control voltage signal; and
a low-pass filter configured to transmit the free-running voltage signal to the voltage control oscillator; and
a controller configured to:
set a frequency division ratio of the first frequency divider and a frequency division ratio of the second frequency divider;
calculate, based on a difference between a voltage value of the control voltage signal and a voltage value of an ideal control voltage signal, a free-running voltage correction value corresponding to the difference; and
set the free-running voltage signal corrected by the free-running voltage correction value in the free-running voltage generator.

2. The phase locked loop according to claim 1 , wherein the controller is further configured to calculate the free-running voltage correction value based on a difference between the free-running voltage signals when the free-running voltage signal is changed and a difference between changes of the control voltage signals when the free-running voltage signal is changed.

Assignees

• Jvckenwood Corp

Inventors

• Kuboshima Ryo

Classifications

• H03L7/189

  comprising a D/A converter for generating a coarse tuning voltage · CPC title

• H03L7/099 Primary

  concerning mainly the controlled oscillator of the loop · CPC title

• H03L7/093

  using special filtering or amplification characteristics in the loop (H03L7/087 - H03L7/091 take precedence) · CPC title

• H03L7/097 Primary

  using a comparator for comparing the voltages obtained from two frequency to voltage converters · CPC title

• H03L2207/06

  Phase locked loops with a controlled oscillator having at least two frequency control terminals · CPC title