Bipolar junction transistor, and a method of forming a charge control structure for a bipolar junction transistor

Patent metadata

Field	Value
Publication number	US-11355585-B2
Application number	US-201916590142-A
Country	US
Kind code	B2
Filing date	Oct 1, 2019
Priority date	Oct 1, 2019
Publication date	Jun 7, 2022
Grant date	Jun 7, 2022

Abstract

A charge control structure is provided for a bipolar junction transistor to control the charge distribution in the depletion region extending into the bulk collector region when the collector-base junction is reverse-biased. The charge control structure comprises a lateral field plate above the upper surface of the collector and dielectrically isolated from the upper surface of the collector and a vertical field plate which is at a side of the collector and is dielectrically isolated from the side of the collector. The charge in the depletion region extending into the collector is coupled to the base as well as the field-plates in the charge-control structure, instead of only being coupled to the base of the bipolar junction transistor. In this way, a bipolar junction transistor is provided where the dependence of collector current on the collector-base voltage, also known as Early effect, can be reduced.

First claim

What is claimed is:

1. A bipolar junction transistor, comprising:
a collector;
a base;
an emitter; and
a charge control structure configured to control a charge distribution in the collector to control a breakdown voltage of the bipolar junction transistor, wherein the charge control structure comprises:
a first field plate, extending laterally over, and electrically insulated from, an upper surface of the collector; and
a second field plate, extending vertically adjacent to, and electrically insulated from, a side of the collector.

2. The bipolar junction transistor according to claim 1 , wherein the first field plate extends from the base towards a collector contact.

3. The bipolar junction transistor according to claim 2 , wherein the collector contact is positioned towards a first side of the bipolar junction transistor, and the base is positioned towards a second side of the transistor, opposite the first side.

4. The bipolar junction transistor according to claim 3 , wherein the base has a base contact, and the emitter has an emitter contact, positioned between the collector contact and the base contact, a lateral length of the first field plate being greater than a lateral distance between the emitter and base contacts.

5. The bipolar junction transistor according to claim 4 , wherein the lateral distance between the emitter and base contacts is measured from center points thereof.

6. The bipolar junction transistor according to claim 4 , wherein the lateral length of the first field plate is at least three quarters of the lateral distance between the emitter and collector contacts.

7. The bipolar junction transistor according to claim 6 , wherein the lateral distance between the emitter and collector contacts is measured from center points thereof.

8. The bipolar junction transistor according to claim 1 , wherein the first field plate is electrically insulated from the collector by a first dielectric layer, positioned between the upper surface of the collector and the first field plate.

9. The bipolar junction transistor according to claim 1 , wherein the first field plate comprises a layer of doped semiconductor material.

10. The bipolar junction transistor according to claim 1 , wherein the bipolar junction transistor has a trench structure adjacent a side of the collector, and the second field plate forms part of the trench structure.

11. The bipolar junction transistor according to claim 1 , wherein the second field plate is electrically conductive and is coupled to a field plate contact, such that the potential at the second field plate is configured to be controlled.

12. The bipolar junction transistor according to claim 10 , wherein the trench structure comprises a double trench, wherein each of the double trench is separated from the other of the double trench by the second field plate.

13. The bipolar junction transistor according to claim 12 , wherein the double trench comprises a first trench, positioned between the collector and the second field plate, the first trench comprising a doped semiconductor dielectrically isolated from the collector and the second field plate.

14. The bipolar junction transistor according to claim 10 , wherein the trench structure comprises a doped semiconductor dielectrically isolated from the collector.

15. The bipolar junction transistor according to claim 14 , wherein the trench structure is horizontally aligned with and positioned beneath a base contact.

16. A method of manufacturing the bipolar junction transistor of claim 1 , the method comprising:
providing a wafer;
forming a collector region;
forming the second field plate extending vertically adjacent to and electrically insulated from a side of the collector region;
forming a base region;
forming the first field plate extending laterally over and electrically insulated from an upper surface of the collector region;
forming an emitter region; and
forming contacts for each of the collector, base and emitter regions to form the collector, base and the emitter of the transistor, wherein the first and second field plates form the charge control structure configured to control the charge distribution in the collector to control the breakdown voltage of the transistor.

17. The method according to claim 16 , further comprising forming a trench structure around the collector region, wherein the trench structure includes the second field plate.

18. The method according to claim 16 , wherein the collector region is epitaxially grown, and the method further comprises:
forming a dielectric layer over the collector region, the dielectric layer insulating the first field plate from the collector region;
forming an opening in the dielectric layer; and
depositing a layer of semiconductor over the dielectric layer and doping the layer of semiconductor to form the base region and the first field plate.

19. The method according to claim 16 , wherein the wafer is a silicon-on-oxide wafer.

20. A bipolar junction transistor, comprising:
a collector on a buried oxide layer of a silicon-on-oxide substrate, wherein the collector comprises a collector sink close to a first dielectrically isolated trench on a first side of the bipolar junction transistor;
a dielectric layer recessed into the upper surface of the collector, wherein the dielectric layer comprises a plurality of openings;
an emitter and a base proximal to a second dielectrically isolated trench on a second side of the transistor opposite to the first side, wherein the emitter is positioned over a crystalline intrinsic region of the base;
a first field plate structure extending laterally over the dielectric layer towards the collector sink; and
an emitter contact, a base contact and a collector contact, wherein the base contact connects to an extrinsic polycrystalline portion of the base, such that the base contact is aligned with and positioned over the second dielectrically isolated trench.

Assignees

• Analog Devices International Unlimited Co

Inventors

• Coyne Edward John
• Brannick Alan
• Tooher Shane
• Ó Hannaidh Breandán Pol Og
• O'Sullivan Catriona Marie
• Geary Shane Patrick

Classifications

• H10D84/673

  Vertical complementary BJTs · CPC title

• H10D84/0121

  the complementary BJTs being vertical BJTs · CPC title

• H10D84/038

  using silicon technology, e.g. SiGe · CPC title

• H10D64/117

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title

• H10D64/112

  comprising multiple field plate segments · CPC title