Power conversion apparatus

US11336200B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11336200-B2
Application numberUS-201817044959-A
CountryUS
Kind codeB2
Filing dateApr 6, 2018
Priority dateApr 6, 2018
Publication dateMay 17, 2022
Grant dateMay 17, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A controller (5) of an uninterruptible power supply apparatus includes: first to sixth comparator circuits (22a to 22f) respectively provided corresponding to first to sixth IGBTs (Q1 to Q6) and outputting, based on a comparison result of the magnitude of three-phase AC voltages, signals (A1 to A6) indicating that a corresponding IGBT is to be turned on; and a control unit (23) that, when a voltage between terminals (VD1 or VD2) of a first or second capacitor (C11 or C12) is higher than a target voltage (VDT), turns on and off each of the first to sixth IGBTs based on signals output from the first to sixth comparator circuits to decrease the voltage between terminals of the first or second capacitor.

First claim

Opening claim text (preview).

The invention claimed is: 1. A power conversion apparatus comprising: a converter that generates first to third DC voltages based on first to third AC voltages supplied from an AC power supply and outputs the first to third DC voltages to first to third output nodes, respectively; a first capacitor connected between the first and second output nodes; a second capacitor connected between the second and third output nodes; a controller that controls the converter such that each of voltages between terminals of the first and second capacitors attains to a target voltage; and a rectifier that rectifies the first to third AC voltages and outputs a fourth DC voltage to between the first and third output nodes, the converter including first to third transistors respectively provided corresponding to the first to third AC voltages, each of the first to third transistors having a first electrode connected to the first output node and a second electrode that receives a corresponding AC voltage, fourth to sixth transistors respectively provided corresponding to the first to third AC voltages, each of the fourth to sixth transistors having a first electrode that receives a corresponding AC voltage and a second electrode connected to the third output node, first to sixth diodes respectively connected in anti-parallel with the first to sixth transistors, and first to third AC switches respectively provided corresponding to the first to third AC voltages, each of the first to third AC switches having a first terminal that receives a corresponding AC voltage and a second terminal connected to the second output node, the controller including first to third comparator circuits respectively provided corresponding to the first to third transistors, each of the first to third comparator circuits comparing magnitude of the first to third AC voltages and outputting a signal that allows a corresponding transistor to be turned on when an AC voltage corresponding to the corresponding transistor is higher than other two AC voltages, fourth to sixth comparator circuits respectively provided corresponding to the fourth to sixth transistors, each of the fourth to sixth comparator circuits comparing magnitude of the first to third AC voltages and outputting a signal that allows a corresponding transistor to be turned on when an AC voltage corresponding to the corresponding transistor is lower than other two AC voltages, and a control unit that, when the voltage between terminals of at least any one capacitor of the first and second capacitors is higher than the target voltage, turns on and off each of the first to sixth transistors based on signals output from the first to sixth comparator circuits to decrease the voltage between terminals of the at least any one capacitor of the first and second capacitors. 2. The power conversion apparatus according to claim 1 , wherein when the voltage between terminals of the first capacitor is higher than the target voltage, the control unit turns on and off a transistor of the first to third transistors which is allowed to be turned on by the signals output from the first to third comparator circuits to decrease the voltage between terminals of the first capacitor, and when the voltage between terminals of the second capacitor is higher than the target voltage, the control unit turns on and off a transistor of the fourth to sixth transistors which is allowed to be turned on by the signals output from the fourth to sixth comparator circuit, to decrease the voltage between terminals of the second capacitor. 3. The power conversion apparatus according to claim 2 , wherein the control unit includes a first signal generation unit that generates a first clock signal having a duty ratio corresponding to a deviation between the voltage between terminals of the first capacitor and the target voltage, a first gate circuit that supplies the first clock signal to a gate of the transistor of the first to third transistors which is allowed to be turned on by the signals output from the first to third comparator circuits, a second signal generation unit that generates a second clock signal having a duty ratio corresponding to a deviation between the voltage between terminals of the second capacitor and the target voltage, and a second gate circuit that supplies the second clock signal to a gate of the transistor of the fourth to sixth transistors which is allowed to be turned on by the signals output from the fourth to sixth comparator circuits. 4. The power conversion apparatus according to claim 1 , wherein when a sum of the voltages between terminals of the first and second capacitors is higher than a voltage twice as high as the target voltage, the control unit simultaneously turns on and off a transistor of the first to third transistors which is allowed to be turned on by the signals output from the first to third comparator circuits and a transistor of the fourth to sixth transistors which is allowed to be turned on by the signals output from the fourth to sixth comparator circuits, to decrease the voltages between terminals of the first and second capacitors. 5. The power conversion apparatus according to claim 4 , wherein the control unit includes a signal generation unit that generates a clock signal having a duty ratio corresponding to a deviation between the sum of the voltages between terminals of the first and second capacitors and the voltage twice as high as the target voltage, and a gate circuit that supplies the clock signal to the gate of the transistor of the first to third transistors which is allowed to be turned on by the signals output from the first to third comparator circuits and supplies the clock signal to the gate of the transistor of the fourth to sixth transistors which is allowed to be turned on by the signals output from the fourth to sixth comparator circuits. 6. The power conversion apparatus according to claim 1 , wherein each of the first to third AC switches includes seventh and eighth transistors having first electrodes connected to each other and second electrodes respectively connected to the first terminal and the second terminal, and seventh and eighth diodes respectively connected in anti-parallel with the seventh and eighth transistors. 7. The power conversion apparatus according to claim 6 , wherein when the voltage between terminals of the first capacitor is lower than the target voltage, the controller turns on and off the seventh transistors of the first to third AC switches to increase the voltage between terminals of the first capacitor, and when the voltage between terminals of the second capacitor is lower than the target voltage, the controller turns on and off the eighth transistors of the first to third AC switches to increase the voltage between terminals of the second capacitor. 8. The power conversion apparatus according to claim 7 , wherein the controller includes a first signal generation unit that generates a first clock signal having a duty ratio corresponding to a deviation between the target voltage and the voltage between terminals of the first capacitor, a second signal generation unit that generates a second clock signal having a duty ratio corresponding to a deviation between the target voltage and the voltage between terminals of the second capacitor, and a gate circuit that receives the first and second clock signals, supplies the first clock signal to gates of the seventh transistors of the first to third AC switches during a first period, and supplies the second clock signal to gates of the eighth transistors of the first to third AC switches during a second period. 9. The power conversion apparatus according to claim 1 , wherein the rec

Assignees

Inventors

Classifications

  • for DC powered loads · CPC title

  • Details of control, feedback or regulation circuits · CPC title

  • in a biphase or polyphase circuit arrangement (H02M7/2176 takes precedence; voltage multipliers H02M7/25) · CPC title

  • Neutral point clamped inverters · CPC title

  • in a bridge configuration · CPC title

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What does patent US11336200B2 cover?
A controller (5) of an uninterruptible power supply apparatus includes: first to sixth comparator circuits (22a to 22f) respectively provided corresponding to first to sixth IGBTs (Q1 to Q6) and outputting, based on a comparison result of the magnitude of three-phase AC voltages, signals (A1 to A6) indicating that a corresponding IGBT is to be turned on; and a control unit (23) that, when a vol…
Who is the assignee on this patent?
Toshiba Mitsubishi—Electric Ind Systems Corporation, Toshiba Mitsubishi Elec Ind
What technology area does this patent fall under?
Primary CPC classification H02M7/08. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 17 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).