Co-existence of full frame and partial frame idle image updates

Patent metadata

Field	Value
Publication number	US-11314310-B2
Application number	US-201715858055-A
Country	US
Kind code	B2
Filing date	Dec 29, 2017
Priority date	Dec 29, 2017
Publication date	Apr 26, 2022
Grant date	Apr 26, 2022

Abstract

Disclosed herein are techniques to coordinate power management between a platform and a panel. Provided are apparatuses, techniques, and circuitry to determine whether to initiate power management features in a panel and send a signal from a platform to the panel including an indication that no frame updates are expected and power management functions can be initiated.

First claim

The invention claimed is:

1. An apparatus, comprising:
a transmitter to send a frame to a panel via a display interconnect; and
a processor coupled to the transmitter, the processor to:
determine whether a full or partial frame update is to be sent to the panel;
determine to initiate power management functions within the panel based on a determination that a full or partial frame update is not to be sent to the panel; and
append a character onto a frame to be sent, by the transmitter, to the panel, the character to indicate to the panel to initiate a power management function comprising at least powering down a display interconnect link within the panel.

2. The apparatus of claim 1 , the transmitter coupled to the panel via a sideband channel, the transmitter to send a control signal to the panel via the sideband channel, the control signal to cause the panel to initiate power management functions.

3. The apparatus of claim 1 , the transmitter to send a control signal to the panel via an auxiliary channel within the display interconnect, the control signal to cause the panel to initiate power management functions.

4. The apparatus of claim 1 , comprising a display interface coupled to the transmitter, the display interface to couple to the display interconnect.

5. The apparatus of claim 4 , the display interface comprising a display port interface or an embedded display port interface.

6. The apparatus of claim 1 , the processor to:
determine whether an idle duration threshold has been met; and
determine to initiate power management functions within the panel based on a determination that the idle duration threshold has been met and that a full or partial frame update is not to be sent to the panel.

7. A method comprising:
determining whether a full or partial frame update is to be sent to a panel;
determining, by a processor in a platform coupled to a panel via a display interconnect, to initiate power management functions within the panel based on a determination that a full or partial frame update is not to be sent to the panel; and
appending, by the processing platform, a character onto a frame to be sent, by a transmitter, to the panel, the character to indicate to the panel to initiate a power management function comprising at least powering down a display interconnect link within the panel.

8. The method of claim 7 , the transmitter coupled to the panel via a sideband channel, the method comprising sending, by the transmitter, a control signal to the panel via the sideband channel, the control signal to cause the panel to initiate power management functions.

9. The method of claim 7 , comprising sending, by the transmitter, a control signal to the panel via an auxiliary channel within the display interconnect, the control signal to cause the panel to initiate power management functions.

10. The method of claim 7 , the display interconnect comprising a display port interconnect or an embedded display port interconnect.

11. The method of claim 7 , comprising:
determining whether an idle duration threshold has been met; and
determining to initiate power management functions within the panel based on a determination that the idle duration threshold has been met and that a full or partial frame update is not to be sent to the panel.

12. At least one non-transitory machine-readable storage medium comprising instructions that when executed by a processor at a platform coupled to a panel via a display interconnect, cause the processor to:
determine whether a full or a partial frame update is to be sent to the panel;
determine to initiate power management functions within a panel based on a determination that a full or partial frame update is not to be sent to the panel; and
append a character onto a frame to be sent, by a transmitter, to the panel, the character to indicate to the panel to initiate a power management function comprising at least powering down a display interconnect link within the panel.

13. The at least one non-transitory machine-readable storage medium of claim 12 , comprising instructions that further cause the processor to cause the transmitter to send a control signal to the panel via a sideband channel, the control signal to cause the panel to initiate power management functions, the transmitter coupled to the panel via the sideband channel.

14. The at least one non-transitory machine-readable storage medium of claim 12 , comprising instructions that further cause the processor to cause the transmitter to send a control signal to the panel via an auxiliary channel within the display interconnect, the control signal to cause the panel to initiate power management functions.

15. The at least one non-transitory machine-readable storage medium of claim 12 , the display interconnect comprising a display port interconnect or an embedded display port interconnect.

16. The at least one non-transitory machine-readable storage medium of claim 12 , comprising instructions that further cause the processor to:
determine whether an idle duration threshold has been met; and
determine to initiate power management functions within the panel based on a determination that the idle duration threshold has been met and that a full or partial frame update is not to be sent to the panel.

Assignees

• Intel Corp

Inventors

• Kwa Seh
• Ansari Nausheen
• Kp Sameer

Classifications

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G06F1/3265

  Power saving in display device · CPC title

• G09G5/395

  Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen (G09G5/399 takes precedence) · CPC title

• G09G5/363

  Graphics controllers · CPC title

• G09G2360/18

  Use of a frame buffer in a display terminal, inclusive of the display panel · CPC title