Double spin filter tunnel junction

Patent metadata

Field	Value
Publication number	US-11309488-B2
Application number	US-201715686848-A
Country	US
Kind code	B2
Filing date	Aug 25, 2017
Priority date	Oct 6, 2015
Publication date	Apr 19, 2022
Grant date	Apr 19, 2022

Abstract

A memory device that includes a first magnetic insulating tunnel barrier reference layer present on a first non-magnetic metal electrode, and a free magnetic metal layer present on the first magnetic insulating tunnel barrier reference layer. A second magnetic insulating tunnel barrier reference layer may be present on the free magnetic metal layer, and a second non-magnetic metal electrode may be present on the second magnetic insulating tunnel barrier. The first and second magnetic insulating tunnel barrier reference layers are arranged so that their magnetizations are aligned to be anti-parallel.

First claim

What is claimed is:

1. A memory device comprising:
a substrate;
a first magnetic insulating tunnel barrier reference layer having a magnetic insulating material on the substrate, the magnetic insulating material exhibiting an insulating property at room-temperature;
a second magnetic insulating tunnel barrier reference layer on the first magnetic insulating tunnel barrier reference layer, the first and second magnetic insulating tunnel barrier reference layers each having a magnetization with a direction perpendicular to a major surface of the substrate and a magnetic polarization of at least 50% to reduce switching current; and
a free magnetic metal layer, having a thickness between 5 Å and 10 Å, disposed directly between the first magnetic insulating tunnel barrier reference layer and the second magnetic insulating tunnel barrier reference layer, wherein a magnetic polarization of the free magnetic metal layer switches at current densities between 10 6 A/cm 2 and 10 7 A/cm 2 .

2. The memory device of claim 1 , further comprising a first metal electrode in direct contact with the first magnetic insulating tunnel barrier reference layer.

3. The memory device of claim 2 , further comprising a second metallic electrode in direct contact with the second magnetic insulating tunnel barrier reference layer.

4. The memory device of claim 3 , wherein at least one of the first metal electrode and the second metallic electrode is non-magnetic.

5. The memory device of claim 1 , wherein the first magnetic insulating tunnel barrier reference layer comprises cobalt iron oxide (CoFeOx).

6. The memory device of claim 1 , wherein the free magnetic metal layer comprises CoFeB.

7. The memory device of claim 1 , wherein the free magnetic metal layer comprises alloys and/or multilayers including elements selected from the group consisting of Fe, Ni, Co, Cr, V, Mn, Pd, Pt, B, O, N and combinations thereof.

8. The memory device of claim 1 , wherein the second magnetic insulating tunnel barrier reference layer comprises cobalt iron oxide (CoFeOx) or CoFeAOx, wherein A may be any element selected from the group consisting of beryllium (Be), boron (B), magnesium (Mg), aluminum (Al), silicon (Si), calcium (Ca), scandium (Sc), titanium (Ti), vanadium (V), chromium (Cr), zinc (Zn), yttria (Y), zirconia (Zr), niobium (Nb), molybdenum (Mo), technetium (Tc), ruthenium (Ru), rhenium (Rh), palladium (Pd), silver (Ag), cadmium (Cd), lutetium (Lu), hafnium (Hf), tantalum (Ta), tungsten (W), rhenium (Re), osmium (Os), iridium (Ir), platinum (Pt), gold (Au) mercury (Hg), and combinations thereof.

9. The memory device of claim 1 , wherein the first magnetic insulating tunnel barrier reference layer, the free magnetic metal layer, and the second magnetic insulating tunnel barrier reference layer provide a magnetic tunnel junction (MJT).

10. The memory device of claim 1 , wherein the first magnetic insulating tunnel barrier layer is in direct contact with a first side of the free magnetic metal layer and the second magnetic insulating tunnel barrier layer is in direct contact with a second side of the free magnetic metal layer.

11. The memory device of claim 1 , wherein the first magnetic insulating tunnel barrier reference layer includes a magnetization in a first direction.

12. The memory device of claim 11 , wherein the magnetization in the first direction ranges from 50 emu/cm 3 to 600 emu/cm 3 .

13. The memory device of claim 11 , wherein the second magnetic insulating tunnel barrier reference layer includes a magnetization in a second direction opposite the first direction.

14. The memory device of claim 1 , wherein the first and second magnetic insulating tunnel barrier reference layers each have a thickness of 100 Å or less.

15. A spin torque transfer magnetic random access memory device comprising:
a magnetic tunnel junction stack between a pair of electrodes, wherein the magnetic tunnel junction stack comprises:
a free magnetic metal layer having a thickness between 5 Å and 10 Å;
a first magnetic insulating tunnel barrier reference layer, formed from magnetic insulating material that includes a spinel or garnet crystal structure, directly on a first face of the free magnetic metal layer and on a substrate, wherein the first magnetic insulating tunnel barrier reference layer has a magnetization with a direction perpendicular to a major surface of the substrate and a magnetic polarization of at least 50% to reduce switching current, the magnetic insulating material exhibiting an insulating property at room-temperature, wherein a magnetic polarization of the free magnetic metal layer switches at current densities between 10 6 A/cm 2 and 10 7 A/cm 2 .

16. The spin torque transfer magnetic random access memory device of claim 15 , wherein the first magnetic insulating tunnel barrier reference layer is in direct contact with the first face of the free magnetic metal layer, and a non-magnetic insulating tunnel barrier and a magnetic metallic reference layer is present on a second face of the free magnetic metal layer opposite the first face of the free magnetic metal layer, the non-magnetic insulating tunnel barrier being disposed between the free magnetic metal layer and the magnetic metallic reference layer.

17. The spin torque transfer magnetic random access memory device of claim 15 , further comprising a second magnetic insulating tunnel barrier reference layer in direct contact with a second face of the free magnetic metal layer, wherein the first and second magnetic insulating tunnel barrier reference layers are arranged so that their magnetizations are aligned to be anti-parallel.

18. The spin torque transfer magnetic random access memory device of claim 17 , wherein the free magnetic metal layer comprises alloys and/or multilayers including elements selected from the group consisting of Fe, Ni, Co, Cr, V, Mn, Pd, Pt, B, 0 , N and combinations thereof.

19. A memory device comprising:
a first magnetic insulating tunnel barrier reference layer having a magnetic insulating material that comprises cobalt iron oxide (CoFeO x ) with a thickness of 100 Å or less, the magnetic insulating material exhibiting an insulating property at room-temperature and having a magnetization in a first direction between 50 emu/cm 3 and 600 emu/cm 3 ;
a first, non-magnetic metal electrode in direct contact with the first magnetic insulating tunnel barrier reference layer;
a second magnetic insulating tunnel barrier reference layer on the first magnetic insulating tunnel barrier reference layer, with a thickness of 100 Å or less, having a magnetization in a second direction, opposite the first direction, the first and second magnetic insulating tunnel barrier reference layers each having a magnetic polarization of at least 90% to reduce switching current;
a second, non-magnetic metal electrode in direct contact with the second magnetic insulating tunnel barrier reference layer;
a free magnetic metal layer, comprising cobalt iron boron (CoFeB) having a thickness between 5 Å and 10 Å, disposed directly between the first magnetic insulating tunnel barrier reference layer and the second magnetic insulating tunnel barrier reference layer, wherein a magnetic polarization of the free magnetic metal layer switches at current densities between 10 6 A/cm 2 and 10 7 A/cm 2 .

Assignees

• IBM

Inventors

• Worledge Daniel C

Classifications

• G11C11/161

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• H10N50/85 Primary

  Materials of the active region · CPC title

• H01L43/02

  Electricity · mapped topic

• H01L43/08

  Electricity · mapped topic

• H01L27/222

  Electricity · mapped topic