On-chip high capacitance termination for transmitters

US11307440B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11307440-B2
Application numberUS-202016843761-A
CountryUS
Kind codeB2
Filing dateApr 8, 2020
Priority dateJul 22, 2016
Publication dateApr 19, 2022
Grant dateApr 19, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A modulator and a capacitor are integrated on a semiconductor substrate for modulating a laser beam. Integrating the capacitor on the substrate reduces parasitic inductance for high-speed optical communication.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for modulating a semiconductor modulator, the method comprising: applying a modulation signal to a contact, wherein the contact is integrated on a substrate that is part of a platform; transmitting the modulation signal to a semiconductor structure, wherein: the semiconductor structure has a direct bandgap, the semiconductor structure is integrated on the substrate, the semiconductor structure is bonded within a recess of the platform, the semiconductor structure comprises a first optical waveguide, the first optical waveguide is a semiconductor waveguide, and the modulation signal applied to the semiconductor structure modulates an optical beam in the first optical waveguide of the semiconductor structure to form a modulated beam; shunting the semiconductor structure with a capacitor that is integrated on the substrate; and transmitting the modulated beam from the first optical waveguide into a second optical waveguide, wherein: the second optical waveguide is part of the platform, and the second optical waveguide is a semiconductor waveguide. 2. The method of claim 1 , further comprising: bonding the semiconductor structure to the platform; forming the contact integrated on the substrate; forming a ground plane integrated on the substrate, wherein the semiconductor structure is electrically between the contact and the ground plane; and bonding the capacitor to the platform, wherein the capacitor is electrically between the contact and the ground plane. 3. The method of claim 1 , wherein: the first optical waveguide is disposed in a first semiconductor material; and the second optical waveguide is disposed in a second semiconductor material, different from the first semiconductor material. 4. The method of claim 3 , wherein a third optical waveguide is disposed in the second semiconductor material of the platform, and the method further comprises transmitting the optical beam from the third optical waveguide into the first optical waveguide. 5. The method of claim 4 , wherein the second semiconductor material is crystalline silicon. 6. The method of claim 5 , wherein the first semiconductor material is a III-V compound. 7. The method of claim 4 , further comprising expanding the optical beam using an optical coupler integrated on the substrate. 8. The method of claim 1 , wherein the modulation signal has a frequency between 2 and 100 gigahertz. 9. The method of claim 1 , wherein the capacitor is within 200 μm of the semiconductor structure. 10. The method of claim 1 , further comprising generating the optical beam using a laser integrated on the substrate.

Assignees

Inventors

Classifications

  • Die-attach connectors and bond wires · CPC title

  • Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells · CPC title

  • using electro-absorption effects, e.g. Franz-Keldysh [FK] effect or quantum confined stark effect [QCSE] · CPC title

  • quantum wells · CPC title

  • Operation of devices; Circuit arrangements, not otherwise provided for in this subclass · CPC title

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What does patent US11307440B2 cover?
A modulator and a capacitor are integrated on a semiconductor substrate for modulating a laser beam. Integrating the capacitor on the substrate reduces parasitic inductance for high-speed optical communication.
Who is the assignee on this patent?
Skorpios Tech Inc
What technology area does this patent fall under?
Primary CPC classification G02F1/01708. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 19 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).