Semiconductor device

Patent metadata

Field	Value
Publication number	US-11296218-B2
Application number	US-202015930806-A
Country	US
Kind code	B2
Filing date	May 13, 2020
Priority date	May 15, 2019
Publication date	Apr 5, 2022
Grant date	Apr 5, 2022

Abstract

A semiconductor device includes a semiconductor body having first and second opposing surfaces, an active area including active transistor cells, and an edge termination region laterally surrounding the active area. Each active transistor cell includes a mesa and a columnar trench having a field plate. The edge termination region includes inactive cells each including a columnar termination trench having a field plate, and a termination mesa including a drift region of a first conductivity type. The edge termination region includes a transition region laterally surrounding the active region and an outer termination region laterally surrounding the transition region. In the transition region, the termination mesa includes a body region of a second conductivity type arranged on the drift region. In the outer termination region, the drift region extends to the first surface. A buried doped region of the edge termination region is positioned in the transition and outer termination regions.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a semiconductor body having a first surface, a second surface opposing the first surface, and side faces;
an active area comprising a plurality of active transistor cells, each active transistor cell comprising a mesa and a columnar trench comprising a field plate; and
an edge termination region laterally surrounding the active area and comprising a plurality of inactive cells, each inactive cell comprising a columnar termination trench comprising a field plate and a termination mesa comprising a drift region of a first conductivity type,
wherein the edge termination region further comprises a transition region laterally surrounding the active region and an outer termination region laterally surrounding the transition region,
wherein in the transition region, the termination mesa comprises a body region of a second conductivity type arranged on the drift region and in the outer termination region the drift region of the termination mesa extends to the first surface,
wherein the edge termination region further comprises a buried doped region having a lateral extent such that the buried doped region is positioned in the transition region and in the outer termination region.

2. The semiconductor device of claim 1 , wherein the buried doped region comprises an inner edge positioned under the body region in the transition region.

3. The semiconductor device of claim 1 , wherein the edge termination region further comprises an outer region that is free of inactive cells and that laterally surrounds the outer termination region.

4. The semiconductor device of claim 3 , wherein the buried doped region has an outer edge that is positioned in the outer region.

5. The semiconductor device of claim 4 , wherein the outer edge is positioned laterally between the side faces of the semiconductor body and the plurality of inactive cells.

6. The semiconductor device of claim 1 , wherein the buried doped region has the second conductivity type.

7. The semiconductor device of claim 1 , wherein the buried doped region is fully depletable.

8. The semiconductor device of claim 1 , wherein in the transition region, the buried doped region is vertically spaced apart from the body region of the termination mesa by a portion of the drift region.

9. The semiconductor device of claim 1 , wherein the columnar trenches have a base positioned at a depth d from the first surface and the buried doped region is positioned at a depth d buried from the first surface, and wherein 0.6 μm≤d buried ≤2.0 μm.

10. The semiconductor device of claim 1 , wherein in the transition region, the body region of the termination mesas extends to the first surface.

11. The semiconductor device of claim 1 , wherein the buried doped region forms a portion of side walls of at least two rows of columnar termination trenches.

12. The semiconductor device of claim 1 , wherein each mesa of the active transistor cells comprises a drift region of the first conductivity type, a body region of the second conductivity type arranged on the drift region, a source region of the first conductivity type arranged on the body region, and a gate trench comprising a gate electrode and that extends through the source region and the body region into the drift region, and wherein each of the columnar trenches extends from the first surface through the body region and into the drift region.

13. The semiconductor device of claim 12 , wherein the gate trenches have a strip or stripe form.

14. The semiconductor device of claim 1 , further comprising at least one gate finger extending over the edge termination region to a gate runner that is positioned laterally between the side faces of the semiconductor body and the columnar termination trenches of the outer termination region.

15. The semiconductor device of claim 14 , wherein the gate runner is positioned laterally between the side faces and an outer edge of the buried doped region.

16. The semiconductor device of claim 14 , further comprising a gate contact electrically coupling the gate runner to gate electrodes of the active transistor cells, and wherein the gate contact is positioned above the body region in the transition region.

17. The semiconductor device of claim 1 , wherein the semiconductor device is a vertical transistor device.

18. The semiconductor device of claim 1 , wherein the mesas of the active transistor cells are formed by material of the semiconductor body between the columnar trenches.

19. The semiconductor device of claim 1 , wherein a lateral shape, pattern and center-to-center spacing of the columnar termination trenches of the inactive cells are the same as that for the columnar trenches of the active transistor cells.

20. The semiconductor device of claim 1 , wherein the field plates in the columnar termination trenches and in the columnar trenches are of a same size and shape.

Assignees

• Infineon Technologies Austria Ag
• Infineon Technologies Americas Corp

Inventors

• Siemieniec Ralf
• Amali Adam
• Hutzler Michael
• Juhasz Laszlo
• Laforet David
• Ouvrard Cedric
• Yip Li Juin

Classifications

• H10D64/518

  characterised by their lengths or sectional shapes · CPC title

• H10D64/111

  Field plates · CPC title

• H10D62/117

  Shapes of semiconductor bodies · CPC title

• H10D30/665 Primary

  having edge termination structures · CPC title

• H10D30/668 Primary

  having trench gate electrodes, e.g. UMOS transistors · CPC title