Power semiconductor device and method therefor
US-2018138265-A1 · May 17, 2018 · US
US11276773B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11276773-B2 |
| Application number | US-202016950047-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 17, 2020 |
| Priority date | Feb 26, 2020 |
| Publication date | Mar 15, 2022 |
| Grant date | Mar 15, 2022 |
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A semiconductor device includes: first diode trench gates extending along a first main surface from a first end side of a cell region toward a second end side thereof opposite to the first end side, the first diode trench gates being disposed adjacent to each other at a first spacing; a boundary trench gate connected to end portions of the first diode trench gates and extending in a direction intersecting a direction of extension of the first diode trench gates; and second diode trench gates having end portions connected to the boundary trench gate and extending toward the second end side of the cell region.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a cell region including a drift layer of a first conductivity type provided between a first main surface and a second main surface opposite to the first main surface; a termination region surrounding the cell region and including the drift layer between the first main surface and the second main surface; a plurality of first trench gates including a plurality of first trench electrodes provided in a plurality of first trenches, with an insulation film therebetween, in opposed relation to the drift layer, the first trenches being provided to extend along the first main surface from a first end side of the cell region toward a second end side thereof opposite to the first end side, the first trenches being disposed adjacent to each other at a first spacing; a boundary trench gate including a boundary trench electrode provided in a boundary trench, with an insulation film therebetween, in opposed relation to the drift layer, the boundary trench being provided to extend in a direction intersecting a direction of extension of the first trenches, the boundary trench being connected to end portions of the respective first trenches, the boundary trench electrode being electrically connected to the first trench electrodes; and a plurality of second trench gates including a plurality of second trench electrodes provided in a plurality of second trenches, with an insulation film therebetween, in opposed relation to the drift layer, each of the second trenches having an end portion connected to the boundary trench, the second trenches being provided to extend toward the second end side of the cell region, the second trenches being disposed adjacent to each other at a second spacing different from the first spacing, the second trench electrodes being electrically connected to the boundary trench electrode. 2. The semiconductor device according to claim 1 , wherein the second spacing is greater than the first spacing. 3. The semiconductor device according to claim 1 , wherein the termination region includes: a termination well layer of a second conductivity type provided between the first main surface and the drift layer; and a termination collector layer of the second conductivity type provided between the second main surface and the drift layer. 4. The semiconductor device according to claim 1 , wherein the cell region includes: an IGBT region having a base layer of the second conductivity type provided between the first main surface and the drift layer, and a collector layer of the second conductivity type provided between the second main surface and the drift layer; and a diode region having an anode layer of the second conductivity type provided between the first main surface and the drift layer, and a cathode layer of the first conductivity type provided between the second main surface and the drift layer. 5. The semiconductor device according to claim 4 , wherein the first trench gates, the second trench gates, and the boundary trench gate are provided in the diode region. 6. The semiconductor device according to claim 4 , wherein the first trench gates, the second trench gates, and the boundary trench gate are provided in the IGBT region. 7. The semiconductor device according to claim 1 , wherein the first trench gates have respective end portions positioned so as not to be opposed to end portions of the second trench gates, with the boundary trench gate therebetween. 8. The semiconductor device according to claim 1 , wherein the boundary trench gate is connected to the first trench gates or the second trench gates in a T-shaped configuration in all connection portions to the first trench gates or the second trench gates. 9. The semiconductor device according to claim 1 , further comprising: a third trench gate including a third trench electrode provided in a third trench, with an insulation film therebetween, in opposed relation to the drift layer, the third trench being provided to extend in a direction intersecting a direction of extension of the first trenches, the third trench connecting adjacent ones of the first trenches; and a fourth trench gate including a fourth trench electrode provided in a fourth trench, with an insulation film therebetween, in opposed relation to the drift layer, the fourth trench being provided to extend in a direction intersecting a direction of extension of the second trenches, the fourth trench connecting adjacent ones of the second trenches.
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