System and method for adjusting duty cycle of a signal
US-10958257-B1 · Mar 23, 2021 · US
US11264979B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-11264979-B1 |
| Application number | US-202017069643-A |
| Country | US |
| Kind code | B1 |
| Filing date | Oct 13, 2020 |
| Priority date | Oct 13, 2020 |
| Publication date | Mar 1, 2022 |
| Grant date | Mar 1, 2022 |
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A circuit includes a period calculator and a pulse width calculator. The period calculator is configured for receiving a first predetermined digital code and a second predetermined digital code, and for calculating a first calculated period value according to the first predetermined digital code, and calculating a second calculated period value according to the second predetermined digital code. The first predetermined digital code has a first predetermined period value, and the second predetermined digital code has a second predetermined period value. The pulse width calculator is configured for receiving a predetermined pulse width, and calculating a first pulse width code corresponding to the predetermined pulse width according to the first predetermined period value, the second predetermined period value, the first calculated period value, the second calculated period value and the predetermined pulse width.
Opening claim text (preview).
What is claimed is: 1. A circuit, comprising: a period calculator, for receiving a first predetermined digital code and a second predetermined digital code, and for calculating a first calculated period value according to the first predetermined digital code, and calculating a second calculated period value according to the second predetermined digital code, the first predetermined digital code having a first predetermined period value, the second predetermined digital code having a second predetermined period value; and a pulse width calculator, for receiving a predetermined pulse width, and calculating a first pulse width code corresponding to the predetermined pulse width according to the first predetermined period value, the second predetermined period value, the first calculated period value, the second calculated period value and the predetermined pulse width. 2. The circuit of claim 1 , the pulse width calculator is configured for calculating an offset value k, the offset value k is expressed as: k = T D 2 - UT D 1 D 2 - D 1 where T is the first predetermined period value, UT is the second predetermined period value, and U>1, D 1 is the first calculated period value, and D 2 is the second calculated period value. 3. The circuit of claim 2 , wherein the pulse width calculator is configured for calculating a linear extrapolation equation of a transfer curve, the linear extrapolation equation is expressed as: y = T ( U - 1 ) D 2 - D 1 V + k = T ( U - 1 ) D 2 - D 1 V + T ( D 2 - UD 1 ) D 2 - D 1 where y is the predetermined pulse width, V is the first pulse width code. 4. The circuit of claim 3 , wherein the first pulse width code V is expressed as: V = y T × D 2 - D 1 U - 1 - D 2 - U D 1 U - 1 . 5. The circuit of claim 4 , further comprising a first operator for comparing the first pulse width code and a check value. 6. The circuit of claim 5 , further comprising a second operator for calculating a modified value, wherein the modified value is equal to the first pulse width code minus the check value. 7. The circuit of claim 6 , wherein the pulse width calculator is configured for calculating a second pulse width code W, the second pulse width code W is expressed as: W = y ( U - 1 ) T × ( D 2 - D
Design optimisation · CPC title
by counting pulses or half-cycles of an AC {(G04F10/005 takes precedence)} · CPC title
Time-to-digital converters [TDC] (analog-to-digital converters with intermediate conversion to time or phase H03M1/50, H03M1/60) · CPC title
Duration or width modulation {; Duty cycle modulation} · CPC title
the output pulses having a constant duty cycle · CPC title
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