High electron mobility transistor and method for fabricating the same

US11264492B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11264492-B2
Application numberUS-201916533812-A
CountryUS
Kind codeB2
Filing dateAug 7, 2019
Priority dateJul 9, 2019
Publication dateMar 1, 2022
Grant dateMar 1, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a first trench; forming a gate dielectric layer on the hard mask and into the first trench; forming a gate electrode on the gate dielectric layer; and forming a source electrode and a drain electrode adjacent to two sides of the gate electrode.

First claim

Opening claim text (preview).

What is claimed is: 1. A high electron mobility transistor (HEMT), comprising: a buffer layer on a substrate; a barrier layer on the buffer layer; a gate electrode on the barrier layer; a gate dielectric layer between the barrier layer and the gate electrode; a doped region under the gate dielectric layer and overlapping the barrier layer and the buffer layer, wherein two sidewalls of the doped region are aligned with two sidewalls of the gate electrode; a hard mask between the gate dielectric layer and the barrier layer, wherein a sidewall of the gate dielectric layer is aligned with a sidewall of the hard mask and a width of a bottom surface of the doped region is greater than a width of a bottom surface of the gate dielectric layer and equal to a width of a top surface the gate electrode; and a source electrode and a drain electrode adjacent to two sides of the gate electrode on the buffer layer. 2. The HEMT of claim 1 , wherein the doped region comprises a U-shape.

Assignees

Inventors

Classifications

  • of electrically inactive species · CPC title

  • the insulator being formed after the semiconductor body, the semiconductor being a Group III-V material · CPC title

  • into Group III-V semiconductors · CPC title

  • of electrically active species · CPC title

  • for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673) · CPC title

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What does patent US11264492B2 cover?
A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; performing an implantation process through the hard mask to form a doped region in the barrier layer and the buffer layer; removing the hard mask and the barrier layer to form a firs…
Who is the assignee on this patent?
United Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification H10D30/475. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).