Differential amplifier, pixel circuit and solid-state imaging device

Patent metadata

Field	Value
Publication number	US-11258976-B2
Application number	US-201816754239-A
Country	US
Kind code	B2
Filing date	Oct 3, 2018
Priority date	Oct 11, 2017
Publication date	Feb 22, 2022
Grant date	Feb 22, 2022

Abstract

A pixel circuit includes a differential amplifier. The differential amplifier includes a non-inverting input terminal, an inverting input terminal, and an output terminal. The differential amplifier includes an input differential pair including first and second NMOS transistors, a current mirror pair including PMOS transistors, and a constant current source including a fifth NMOS transistor. A threshold voltage of each of the first and second NMOS transistors is higher than a threshold voltage of the fifth NMOS transistor. Further, the threshold voltage of each of the first and second NMOS transistors is higher than a threshold voltage of another NMOS transistor.

First claim

The invention claimed is:

1. A differential amplifier including a first input terminal, a second input terminal, and an output terminal, the differential amplifier comprising:
an input differential pair including a first MOS transistor and a second MOS transistor of a first conductivity type, sources of the first MOS transistor and the second MOS transistor being connected to a common node, a gate of the first MOS transistor being connected to the first input terminal, and a gate of the second MOS transistor being connected to the second input terminal;
a current mirror pair including a third MOS transistor and a fourth MOS transistor of a second conductivity type, a first reference voltage being input to sources of the third MOS transistor and the fourth MOS transistor, a drain of the third MOS transistor being connected to a drain of the first MOS transistor, a drain of the fourth MOS transistor being connected to a drain of the second MOS transistor and the output terminal, and gates of the third MOS transistor and the fourth MOS transistor being connected to the drain of the third MOS transistor; and
a constant current source including a fifth MOS transistor of the first conductivity type, a second reference voltage being input to a source of the fifth MOS transistor, a drain of the fifth MOS transistor being connected to the common node, and a third reference voltage being input to a gate of the fifth MOS transistor, wherein
a threshold voltage of each of the first MOS transistor and the second MOS transistor is higher than a threshold voltage of the fifth MOS transistor, and
an impurity concentration in a channel region under the gate of each of the first MOS transistor and the second MOS transistor is higher than an impurity concentration in a channel region under the gate of the fifth MOS transistor.

2. The differential amplifier according to claim 1 , wherein a conductivity type or an impurity concentration is different between the gate of each of the first MOS transistor and the second MOS transistor and the gate of the fifth MOS transistor.

3. A pixel circuit comprising:
the differential amplifier according to claim 1 ; and
an integration capacitive element provided between the second input terminal and the output terminal of the differential amplifier and configured to accumulate charges according to a signal input to the second input terminal, wherein
a signal having a value according to an amount of accumulated charges in the integration capacitive element is output from the output terminal of the differential amplifier.

4. A solid-state imaging device comprising:
the pixel circuit according to claim 3 ; and
a photodiode, wherein
the pixel circuit inputs a signal output according to light reception from the photodiode to the second input terminal of the differential amplifier, and outputs an output signal having a value according to an amount of received light from the output terminal of the differential amplifier.

5. The solid-state imaging device according to claim 4 , wherein a plurality of photodiodes are formed on a first substrate, a plurality of pixel circuits are formed on a second substrate, and the first substrate and the second substrate are disposed to face each other.

6. A pixel circuit comprising a differential amplifier including a first input terminal, a second input terminal, and an output terminal; and an integration capacitive element provided between the second input terminal and the output terminal of the differential amplifier and configured to accumulate charges according to a signal input to the second input terminal, the pixel circuit outputting a signal having a value according to an amount of accumulated charges in the integration capacitive element from the output terminal of the differential amplifier, wherein
the differential amplifier comprises:
an input differential pair including a first MOS transistor and a second MOS transistor of a first conductivity type, sources of the first MOS transistor and the second MOS transistor being connected to a common node, a gate of the first MOS transistor being connected to the first input terminal, and a gate of the second MOS transistor being connected to the second input terminal;
a current mirror pair including a third MOS transistor and a fourth MOS transistor of a second conductivity type, a first reference voltage being input to sources of the third MOS transistor and the fourth MOS transistor, a drain of the third MOS transistor being connected to a drain of the first MOS transistor, a drain of the fourth MOS transistor being connected to a drain of the second MOS transistor and the output terminal, and gates of the third MOS transistor and the fourth MOS transistor being connected to the drain of the third MOS transistor; and
a constant current source including a fifth MOS transistor of the first conductivity type, a second reference voltage being input to a source of the fifth MOS transistor, a drain of the fifth MOS transistor being connected to the common node, and a third reference voltage being input to a gate of the fifth MOS transistor, and wherein
the pixel circuit further comprises a sixth MOS transistor of the first conductivity type including a gate to which a signal output from the output terminal of the differential amplifier is input and constituting a source follower circuit, and a seventh MOS transistor of the first conductivity type connected in series with the sixth MOS transistor, and
a threshold voltage of each of the first MOS transistor and the second MOS transistor is higher than a threshold voltage of each of the sixth MOS transistor and the seventh MOS transistor.

7. The pixel circuit according to claim 6 , wherein an impurity concentration in a channel region under the gate of each of the first MOS transistor and the second MOS transistor is higher than an impurity concentration in a channel region under the gate of each of the sixth MOS transistor and the seventh MOS transistor.

8. The pixel circuit according to claim 6 , wherein a conductivity type or an impurity concentration is different between the gate of each of the first MOS transistor and the second MOS transistor and the gate of each of the sixth MOS transistor and the seventh MOS transistor.

9. The pixel circuit according to claim 6 , wherein a threshold voltage of the fifth MOS transistor is higher than the threshold voltage of each of the sixth MOS transistor and the seventh MOS transistor.

10. The pixel circuit according to claim 9 , wherein an impurity concentration in a channel region under the gate of the fifth MOS transistor is higher than an impurity concentration in a channel region under the gate of each of the sixth MOS transistor and the seventh MOS transistor.

11. The pixel circuit according to claim 9 , wherein a conductivity type or an impurity concentration is different between the gate of the fifth MOS transistor and the gate of each of the sixth MOS transistor and the seventh MOS transistor.

12. A solid-state imaging device comprising:
the pixel circuit according to claim 6 ; and
a photodiode, wherein
the pixel circuit inputs a signal output according to light reception from the photodiode to the second input terminal of the differential amplifier, and outputs an output signal having a value according to an amount of received light from the output terminal of the differential amplifier.

13. The solid-state imaging device according to claim 12 , wherein a plurality of photodiodes are formed on a first substrate, a plurality of pixel circuits are formed on a second substrate, and the first substrate and the second substrate are disposed to face each o

Assignees

• Hamamatsu Photonics Kk

Inventors

• Morita Sho
• Kurashina Takayuki
• Yamamoto Hiroo

Classifications

• H04N25/778 Primary

  comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself · CPC title

• H04N25/77

  Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

• H03F2203/45512

  the FBC comprising one or more capacitors, not being switched capacitors, and being coupled between the LC and the IC · CPC title

• H03F2200/396

  the output of an amplifier can be switched on or off by a switch to couple the output signal to a load · CPC title

• H03F2203/45174

  the application of the differential amplifier being in an integrator circuit · CPC title