Device for power factor correction

Patent metadata

Field	Value
Publication number	US-11258355-B2
Application number	US-201916399522-A
Country	US
Kind code	B2
Filing date	Apr 30, 2019
Priority date	Jul 27, 2018
Publication date	Feb 22, 2022
Grant date	Feb 22, 2022

Abstract

A device for power factor correction can include a converter housing having an inner surface; a first converter substrate mounted on the inner surface of the converter housing; a second converter substrate mounted on another surface of first converter housing opposite to the inner surface; and a housing cover covering the first converter substrate and coupled to an upper surface of the converter housing, in which the second converter substrate includes a first surface having a first region including a source pad, and a second region including a drain pad spaced apart from the source pad, the source pad including a source pad extension portion extending into the second region; and a second surface including a heat dissipation pad for communicating heat from the source and drain pads to an outside of the device, in which the first region of the second converter substrate overlaps with the another surface of first converter housing, and the second region of the second converter substrate faces the housing cover without overlapping with the first converter substrate.

First claim

The invention claimed is:

1. A device for power factor correction, the device comprising:
a converter housing having an inner surface;
a first converter substrate mounted on the inner surface of the converter housing;
a second converter substrate mounted on another surface of the converter housing opposite to the inner surface of the converter housing; and
a housing cover covering the first converter substrate and coupled to an upper surface of the converter housing,
wherein the second converter substrate includes:
a first surface having a first region including a source pad, and a second region including a drain pad spaced apart from the source pad, the source pad including a source pad extension portion extending into the second region; and
a second surface including a heat dissipation pad for communicating heat from the source and drain pads to an outside of the device,

wherein the first region of the second converter substrate overlaps with the another surface of the converter housing,
wherein the second region of the second converter substrate faces the housing cover without overlapping with the first converter substrate, and
wherein an area of the source pad is greater than an area of the drain pad.

2. The device for power factor correction of claim 1 , further comprising:
a power factor correction (PFC) converter having a plurality of electrical components,
wherein the plurality of electrical components are disposed across the first and second converter substrates, and
wherein an output of the power factor correction (PFC) converter is connected to a DC-DC converter.

3. The device for power factor correction of claim 1 , further comprising:
an air layer between the second region of the second converter substrate and the housing cover.

4. The device for power factor correction of claim 3 , wherein the air layer is between the housing cover and the drain pad and the source pad extension portion.

5. The device for power factor correction of claim 3 , wherein the drain pad and the source pad extension portion are both disposed between the air layer and at least a portion of the heat dissipation pad.

6. The device for power factor correction of claim 1 , wherein the area of the source pad is at least twice as large as the area of the drain pad, and the area of the source pad is less than 50 times as large as the area of the drain pad.

7. The device for power factor correction of claim 1 , wherein an area of the converter housing is less than 50 times as large as the area of the drain pad.

8. The device for power factor correction of claim 1 , wherein the converter housing includes:
a plurality of first internal connection terminals disposed on one side of the inner surface of the converter housing;
a plurality of second internal connection terminals disposed on another side of the inner surface of the converter housing;
a plurality of first external connection terminals disposed on one perimeter surface of the converter housing and electrically connected to the plurality of first internal connection terminals, respectively; and
a plurality of second external connection terminals disposed on another perimeter surface of the converter housing and electrically connected to the plurality of second internal connection terminals, respectively.

9. The device for power factor correction of claim 8 , wherein the first converter substrate includes a plurality of first connection terminals disposed on one side of the first converter substrate and a plurality of second connection terminals disposed on another side of the first converter substrate.

10. The device for power factor correction of claim 9 , wherein the plurality of first connection terminals are directly connected to the plurality of first internal connection terminals, respectively.

11. The device for power factor correction of claim 9 , wherein each of the source pad and the drain pad is electrically connected to the plurality of second connection terminals and the plurality of second internal connection terminals through wires.

12. The device for power factor correction of claim 1 , wherein the heat dissipation pad includes a plurality of heat dissipation pads mounted on the second surface of the second converter substrate.

13. The device for power factor correction of claim 1 , further comprising:
at least one transistor element disposed in the second region of the second converter substrate, the at least one transistor element being electrically connected between the source pad and the drain pad.

14. A device for power factor correction, the device comprising:
a first converter substrate;
a second converter substrate;
a power factor correction (PFC) converter including a plurality of electrical components disposed across the first and second converter substrates;
a converter housing disposed between the first and second converter substrates; and
a housing cover overlapping with both the first and second converter substrates,
wherein the second converter substrate includes:
a first surface having a first region including a source pad, and a second region including a drain pad spaced apart from the source pad; and
a second surface including a heat dissipation pad for dissipating heat from the source and drain pads,

wherein the first region of the second converter substrate overlaps with the first converter substrate,
wherein the second region of the second converter substrate faces the housing cover without overlapping with the first converter substrate, and
wherein an area of the source pad is greater than an area of the drain pad.

15. The device for power factor correction of claim 14 , wherein the source pad includes a source pad extension portion extending into the second region.

16. The device for power factor correction of claim 14 , further comprising:
an air layer between the second region of the second converter substrate and the housing cover.

17. The device for power factor correction of claim 16 , wherein the air layer is between the housing cover and the drain pad and the source pad extension portion.

18. The device for power factor correction of claim 16 , wherein the drain pad and the source pad extension portion are both disposed between the air layer and at least a portion of the heat dissipation pad.

19. A device for power factor correction, the device comprising:
a first converter substrate;
a second converter substrate;
a power factor correction (PFC) converter including a plurality of electrical components disposed across the first and second converter substrates; and
a converter housing disposed between the first and second converter substrates,
wherein the second converter substrate includes:
a first surface having a first region including a source pad, and a second region including a drain pad spaced apart from the source pad; and
a second surface including a heat dissipation pad for dissipating heat from the source and drain pads, and

wherein an area of the source pad is at least twice as large as an area of the drain pad.

Assignees

• Lg Electronics Inc

Inventors

• Cho Seongmoo
• Kim Kwangsoo

Classifications

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title

• H02M1/4258 Primary

  using a single converter stage both for correction of AC input power factor and generation of a regulated and galvanically isolated DC output voltage (H02M1/4241 takes precedence) · CPC title

• H02M3/003

  Constructional details, e.g. physical layout, assembly, wiring or busbar connections · CPC title

• H02M1/4225 Primary

  using a non-isolated boost converter · CPC title

• H02P2201/15

  Power factor correction [PFC] circuit generating the DC link voltage for motor driving inverter · CPC title