Aging detection circuit, aging compensation circuit, display panel and aging compensation method

Patent metadata

Field	Value
Publication number	US-11257406-B2
Application number	US-201916618241-A
Country	US
Kind code	B2
Filing date	May 13, 2019
Priority date	May 16, 2018
Publication date	Feb 22, 2022
Grant date	Feb 22, 2022

Abstract

An aging detection circuit, an aging compensation circuit, a display panel, and an aging compensation method are provided. The aging detection circuit includes: a first current mirror circuit, a second current mirror circuit, a voltage converter and an analog-digital converter. An input terminal of the first current mirror circuit is electrically coupled to an initial reference voltage terminal and an anode of a to-be-detected light-emitting diode respectively, and an output terminal of the first current mirror circuit is electrically coupled to an input terminal of the second current mirror circuit. An output terminal of the second current mirror circuit is electrically coupled to an input terminal of the voltage converter.

First claim

What is claimed is:

1. An aging detection circuit, comprising a first current mirror circuit, a second current mirror circuit, a voltage converter, and an analog-to-digital converter, wherein
an input terminal of the first current mirror circuit is electrically coupled to an initial reference voltage terminal via one initial switch and an anode of a to-be-detected light-emitting diode respectively, an output terminal of the first current mirror circuit is electrically coupled to an input terminal of the second current mirror circuit, and a power input terminal of the first current mirror circuit is electrically coupled to a first reference voltage terminal,
an output terminal of the second current mirror circuit is electrically coupled to an input terminal of the voltage converter, and a power input terminal of the second current mirror circuit is electrically coupled to a third reference voltage terminal, one of the first current mirror circuit and the second current mirror circuit is an N-type current mirror circuit, and the other of the first current mirror circuit and the second current mirror circuit is a P-type current mirror circuit,
the voltage converter is configured to convert a current output from the second current mirror circuit into a voltage and output the voltage, and
the analog-to-digital converter is configured to convert the voltage signal output from the voltage converter into a digital signal,
one terminal of the initial switch is directly and only coupled to the initial reference voltage terminal, and another terminal of the initial switch is directly and only coupled to the input terminal of the first current mirror circuit.

2. The aging detection circuit according to claim 1 , wherein the first reference voltage terminal is a ground terminal, the third reference voltage terminal is a voltage terminal that provides a voltage higher than a voltage of the first reference voltage terminal, the first current mirror circuit is an N-type current mirror circuit, and the second current mirror circuit is a P-type current mirror circuit.

3. The aging detection circuit according to claim 2 , wherein
the voltage converter comprises an integration circuit, a second switch, a second capacitor, and a third switch,
the integration circuit comprises an amplifier, a first capacitor and a first switch,
an inverting input terminal of the amplifier serves as the input terminal of the voltage converter, and a non-inverting input terminal of the amplifier is coupled to a second reference voltage terminal,
one terminal of the first capacitor is coupled to the inverting input terminal of the amplifier, and the other terminal of the first capacitor is coupled to an output terminal of the amplifier,
one terminal of the first switch is electrically coupled to the one terminal of the first capacitor, and the other terminal of the first switch is electrically coupled to the other terminal of the first capacitor,
one terminal of the second capacitor is coupled between the second switch and the third switch, and the other terminal of the second capacitor is electrically coupled to the first reference voltage terminal, and
one terminal of the third switch is coupled to the second switch and the second capacitor, and the other terminal of the third switch serves as an output terminal of the voltage converter.

4. The aging detection circuit according to claim 2 , wherein
the first current mirror circuit comprises a first N-type current mirror transistor and a second N-type current mirror transistor,
a gate electrode of the first N-type current mirror transistor is electrically coupled to a gate electrode of the second N-type current mirror transistor, a first electrode of the first N-type current mirror transistor serves as an input terminal of the aging detection circuit, a second electrode of the first N-type current mirror transistor serves as the power input terminal of the first current mirror circuit, and the first electrode of the first N-type current mirror transistor is electrically coupled to the gate electrode of the first N-type current mirror transistor, and
a first electrode of the second N-type current mirror transistor serves as the output terminal of the first current mirror circuit, and a second electrode of the second N-type current mirror transistor is electrically coupled to the second electrode of the first N-type current mirror transistor.

5. The aging detection circuit according to claim 2 , wherein
the second current mirror circuit comprises a first P-type current mirror transistor and a second P-type current mirror transistor,
a gate electrode of the first P-type current mirror transistor is electrically coupled to a gate electrode of the second P-type current mirror transistor, a first electrode of the first P-type current mirror transistor serves as the input terminal of the second current mirror circuit, a second electrode of the first P-type current mirror transistor serves as the power input terminal of the second current mirror circuit, and the first electrode of the first P-type current mirror transistor is electrically coupled to the gate electrode of the first P-type current mirror transistor, and
a first electrode of the second P-type current mirror transistor serves as the output terminal of the second current mirror circuit, and a second electrode of the second P-type current mirror transistor is electrically coupled to the second electrode of the first P-type current mirror transistor.

6. The aging detection circuit according to claim 2 , wherein
the second current mirror circuit comprises a first P-type current mirror transistor, a second P-type current mirror transistor, a third P-type current mirror transistor, and a fourth P-type current mirror transistor,
a gate electrode of the first P-type current mirror transistor is electrically coupled to a gate electrode of the second P-type current mirror transistor, a first electrode of the first P-type current mirror transistor is electrically coupled to a first electrode of the third P-type current mirror transistor, a second electrode of the first P-type current mirror transistor serves as the power input terminal of the second current mirror circuit, and the gate electrode of the first P-type current mirror transistor is electrically coupled to the first electrode of the first P-type current mirror transistor,
a first electrode of the second P-type current mirror transistor is electrically coupled to a first electrode of the fourth P-type current mirror transistor, and a second electrode of the second P-type current mirror transistor is electrically coupled to the second electrode of the first P-type current mirror transistor,
a gate electrode of the third P-type current mirror transistor is electrically coupled to a gate electrode of the fourth P-type current mirror transistor, a second electrode of the third P-type current mirror transistor serves as the input terminal of the second current mirror circuit, and the gate electrode of the third P-type current mirror transistor is electrically coupled to the second electrode of the third P-type current mirror transistor, and
a second electrode of the fourth P-type current mirror transistor serves as the output terminal of the second current mirror circuit.

7. An aging compensation circuit, comprising a compensation value calculation circuit, a source driving circuit, and an aging detection circuit which is the aging detection circuit according to claim 1 , wherein
an output terminal of the analog-to-digital converter in the aging detection circuit is electrically coupled to the compensation value calculation circuit
the compensation value calculation circuit is configured to determine and output a data voltage compensation value corr

Assignees

• Hefei Xinsheng Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Hu Qi
• Jing Hui
• Liao Weijing

Classifications

• G09G2320/045

  Compensation of drifts in the characteristics of light emitting or modulating elements · CPC title

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G3/3275

  Details of drivers for data electrodes · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G3/006 Primary

  Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title