Organic light emitting display device

US10347692B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10347692-B2
Application numberUS-201715792285-A
CountryUS
Kind codeB2
Filing dateOct 24, 2017
Priority dateOct 25, 2016
Publication dateJul 9, 2019
Grant dateJul 9, 2019

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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An organic light emitting display device in an embodiment of the present invention comprises a display panel equipped with a plurality of pixels each including an OLED and a driving TFT for driving the OLED and a sensing circuit connected to pixels through a sensing line and detecting driving characteristics of a corresponding pixel. The sensing circuit may comprise a plural sensing units including an integrator for integrating currents respectively flowing two adjacent sensing lines connected to inverting and non-inverting input terminals of a fully differential amplifier, a sampling unit for respectively sampling two integral outputs of the integrator and a scaler for regulating an operating range of outputs of the sampling unit, a differential amplifier for differentially amplifying one or more outputs of the scaler, and an ADC for converting an output of the differential amplifier into a digital sensing value.

First claim

Opening claim text (preview).

What is claimed is: 1. A circuit for detecting driving characteristics of an organic light emitting diode (OLED), the circuit comprising: an integrator configured to integrate currents which respectively flow adjacent two sensing lines connected to an inverting input terminal and a non-inverting input terminal of a fully differential amplifier, the sensing line being connected to a driving thin film transistor (TFT) for driving the OLED constituting a pixel of a display panel; a sampling unit configured to respectively sample two integral outputs of the integrator; a differential amplifier configured to differentially amplify one or more sampling outputs of the sampling unit; and an analog-to-digital converter (ADC) configured to convert an output of the differential amplifier into a digital sensing value. 2. The circuit of claim 1 , further comprising: a scaler configured to respectively convert two sampling outputs of the sampling unit into an operating range of the ADC, and output a result to the differential amplifier. 3. The circuit of claim 1 , further comprising: first and second sensing switches configured to respectively couple the inverting input terminal and the non-inverting input terminal to the two sensing lines so as to disconnect at a time of display driving for making the OLED emit light and to connect at a time of sense driving for detecting the driving characteristics of the OLED; and first and second mode switches configured to respectively couple two sampling outputs of the sampling unit to two input terminals of the differential amplifier, wherein the integrator comprises a first capacitor and a first reset switch connecting the inverting input terminal and a non-inverting output terminal of the fully differential amplifier and a second capacitor and a second reset switch connecting the non-inverting input terminal and an inverting output terminal of the fully differential amplifier, and a common output terminal of the fully differential amplifier is connected to a reference voltage to be applied to a source electrode of the driving TFT, and wherein the sampling unit comprises first and second sampling capacitors and first and second sampling switches for respectively coupling first terminals of the first and second sampling capacitors to the non-inverting output terminal and the inverting output terminal, and second terminals of the first and second sampling capacitors are connected to a second reference voltage related to an operating range of the ADC. 4. The circuit of claim 3 , wherein the first mode switch selectively connects a first sampling output or a second sampling output to a first input terminal of the differential amplifier, and the second mode switch selectively connects the second sampling output or a third reference voltage to a second input terminal of the differential amplifier. 5. The circuit of claim 4 , wherein in a first mode using a difference value between sensing values of the two sensing lines, the first mode switch connects the first input terminal of the differential amplifier to the first sampling output and the second mode switch connects the second input terminal of the differential amplifier to the second sampling output, and wherein in a second mode using a difference value between each sensing value of the two sensing lines and a predetermined reference value, the first mode switch connects the first input terminal of the differential amplifier to the first sampling output and the second mode switch connects the second input terminal of the differential amplifier to the third reference voltage, or the first mode switch connects the first input terminal of the differential amplifier to the second sampling output and the second mode switch connects the second input terminal of the differential amplifier to the third reference voltage. 6. The circuit of claim 3 , further comprising: a first reference switch configured to couple a first input terminal of the differential amplifier to a third reference voltage; and a second reference switch configured to couple a second input terminal of the differential amplifier to the third reference voltage. 7. The circuit of claim 6 , wherein in a first mode using a difference value between sensing values of the two sensing lines, the first mode switch connects the first input terminal of the differential amplifier to the first sampling output and the second mode switch connects the second input terminal of the differential amplifier to the second sampling output, and wherein in a second mode using a difference value between each sensing value of the two sensing lines and a predetermined reference value, the first mode switch connects the first input terminal of the differential amplifier to the first sampling output and the second reference switch connects the second input terminal of the differential amplifier to the third reference voltage, or the second mode switch connects the second input terminal of the differential amplifier to the second sampling output and the first reference switch connects the first input terminal of the differential amplifier to the third reference voltage. 8. The circuit of claim 3 , wherein during an initialization section, the first and second sensing switches, the first and second reset switches, and the first and second sampling switches are turned on and the reference voltage is applied to a source electrode of the driving TFT, during a sampling section, the first and second reset switches are turned off, a data voltage for sensing is applied to a gate electrode of a first driving TFT connected to one of the two sensing lines to turn on the first driving TFT, a predetermined data voltage is applied to a second driving TFT connected to the other of the two sensing lines to turn off the second driving TFT, one of the first and second sampling capacitors stores a first integral output which the integrator integrates a current flowing the source electrode of the first driving TFT to output, and the other of the first and second sampling capacitors stores a second integral output which the integrator integrates a current flowing the source electrode of the second driving TFT to output, and during a conversion section, the first and second sampling switches are turned off, the first and second mode switches are turned on, and the differential amplifier and the ADC convert a difference between the first and second integral outputs stored in the first and second sampling capacitors into a digital value. 9. An organic light emitting display device, comprising: a display panel equipped with a plurality of pixels each of which includes an organic light emitting diode (OLED) and a driving thin film transistor (TFT) for driving the OLED; and a sensing circuit connected to one or more pixels through a sensing line and configured to detect driving characteristics of a corresponding pixel, wherein the sensing circuit comprises: a plurality of sensing units each of which including an integrator configured to integrate currents which respectively flow adjacent two sensing lines connected to an inverting input terminal and a non-inverting input terminal of a fully differential amplifier, a sampling unit configured to respectively sample two integral outputs of the integrator; and a scaler configured to regulate an operating range of outputs of the sampling unit; a differential amplifier configured to differentially amplify one or more outputs of the scaler; and an analog-to-digital converter (ADC) configured to convert an output of the differential amplifier into a digital sensing value. 10. The organic light emitting display device of claim 9 , wherein the sensing unit further comprises: firs

Assignees

Inventors

Classifications

  • G09G3/006Primary

    Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title

  • with pixel circuitry controlling the current through the light-emitting element · CPC title

  • characterised by the chemical or physical composition or the arrangement of auxiliary dielectric or reflective layers · CPC title

  • Details of output amplifiers or buffers arranged for use in a driving circuit · CPC title

  • using an active matrix · CPC title

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What does patent US10347692B2 cover?
An organic light emitting display device in an embodiment of the present invention comprises a display panel equipped with a plurality of pixels each including an OLED and a driving TFT for driving the OLED and a sensing circuit connected to pixels through a sensing line and detecting driving characteristics of a corresponding pixel. The sensing circuit may comprise a plural sensing units inclu…
Who is the assignee on this patent?
Lg Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/006. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jul 09 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).