USB type-C power delivery management

US11249537B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11249537-B2
Application numberUS-202016927649-A
CountryUS
Kind codeB2
Filing dateJul 13, 2020
Priority dateJun 30, 2017
Publication dateFeb 15, 2022
Grant dateFeb 15, 2022

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

When power is provided through a USB-C cable from a source device to a sink device, a sudden connection or disconnection of the cable between the two devices may cause a sudden power surge or power drop in at least one of those devices, leading to other problems. To avoid this sudden event from causing potential damage or disruption to one of the devices, in some embodiments a CC pin in the cable is used to announce the impending connection/disconnection, and the device may throttle back its power consumption before power is actually applied to or removed from the power pins.

First claim

Opening claim text (preview).

What is claimed is: 1. A device, having: a Universal Serial Bus type C (USB-C) port, and a CPU configured to detect a voltage pull down at a channel control (CC) pin of the USB-C port; after a time delay, assert a signal to throttle the CPU to a lower power consumption level; verify a sink port has been disconnected; and de-assert the signal to throttle the CPU. 2. The device of claim 1 , wherein said throttling comprises performing at least one item selected from a list of items consisting of: a) reducing an operating frequency, and b) reducing an operating voltage. 3. The device of claim 1 , wherein the device is to provide a notification of said throttling to CPU power budget software. 4. The device of claim 1 , further comprising: a battery coupled to the CPU, wherein the device is a mobile computer device. 5. The device of claim 1 , wherein the device further is to perform a determination that the voltage of the CC pin is modified longer than the time delay, and the signal is asserted based on the determination. 6. A computer-readable, non-transitory storage medium that contains instructions that, when executed by one or more processors, result in performing operations comprising: detecting a voltage pull down at a channel control (CC) pin of a Universal Serial Bus type C (USB-C) port; after a time delay, asserting a signal to throttle a CPU to a lower power consumption level; verifying a sink port has been disconnected; and de-asserting the signal to throttle the CPU. 7. The storage medium of claim 6 , wherein the operation of throttling the CPU comprises performing at least one item selected from a list of items consisting of: a) reducing an operating frequency of the CPU, and b) reducing an operating voltage of the CPU. 8. The storage medium of claim 6 , the operations further comprising: providing a notification of said CPU throttling to CPU power budget software. 9. The storage medium of claim 8 , wherein the verifying is performed based on the notification. 10. The storage medium of claim 6 , the operations further comprising: performing a determination that the voltage of the CC pin is modified longer than the time delay, wherein the signal is asserted based on the determination. 11. The storage medium of claim 6 , wherein the verifying is performed by detecting a loss of power at a Vbus pin of the USB-C port. 12. The storage medium of claim 6 , wherein the signal is de-asserted based on the verifying. 13. A method implemented by an apparatus, the method comprising: detecting a voltage pull down at a CC pin of a Universal Serial Bus type C (USB-C) port of the apparatus; after a time delay, asserting a signal to perform a throttling of a CPU of the apparatus to a lower power consumption level; verifying a sink port has been disconnected; and de-asserting the signal to throttle the CPU. 14. The method of claim 13 , further comprising: performing a determination that the voltage of the CC pin is modified longer than the time delay, wherein the signal is asserted based on the determination. 15. The method of claim 13 , wherein said throttling includes reducing an operating frequency of the CPU or reducing an operating voltage of the CPU. 16. The method of claim 13 , wherein the verifying is performed by detecting a loss of power at a Vbus pin of the USB-C port. 17. The method of claim 13 , wherein the signal is de-asserted based on the verifying. 18. The method of claim 13 , wherein the apparatus is a mobile computer device, and the apparatus includes a battery coupled to the CPU.

Assignees

Inventors

Classifications

  • G06F1/266Primary

    Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips · CPC title

  • by switching off individual functional units in the computer system · CPC title

  • G06F1/324Primary

    by lowering clock frequency · CPC title

  • for adaptation of a particular data processing system to different peripheral devices · CPC title

  • Monitoring of peripheral devices · CPC title

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Frequently asked questions

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What does patent US11249537B2 cover?
When power is provided through a USB-C cable from a source device to a sink device, a sudden connection or disconnection of the cable between the two devices may cause a sudden power surge or power drop in at least one of those devices, leading to other problems. To avoid this sudden event from causing potential damage or disruption to one of the devices, in some embodiments a CC pin in the cab…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F1/266. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 15 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).