Reduction of idle power in a communication port

Patent metadata

Field	Value
Publication number	US-9811145-B2
Application number	US-201213720531-A
Country	US
Kind code	B2
Filing date	Dec 19, 2012
Priority date	Dec 19, 2012
Publication date	Nov 7, 2017
Grant date	Nov 7, 2017

Abstract

Techniques for reducing idle power consumption of a port are described herein. An example method includes determining device presence using a pull-down resistor disposed in a downstream port. The method also includes initiating a low power state of a link between the downstream port and an upstream device. The method also includes disabling the pull-down resistor in response to initiating the low power state.

First claim

What is claimed is:

1. An electronic device, comprising:
a downstream port comprising a physical layer to send and receive data to an upstream device via a link, the physical layer comprising:
a pull-down resistor to determine presence of the upstream device; and
a switch coupled to the pull-down resistor, the switch to disable the pull-down resistor in response to the downstream port initiating a low power state of the link between the downstream port and the upstream device, wherein the switch is controlled by input from a link layer of the downstream port; and
wherein the physical layer comprises a timer to perform periodic monitoring of the presence of the upstream device, the link layer of the downstream port to start the timer upon entering the low power state and, at the expiration of the timer, enable the pull-down resistor for a predetermined amount of time to determine whether the upstream device has been disconnected, wherein if the upstream device is detected as present, the downstream port is to disable the pull-down resistor and restart the timer.

2. The electronic device of claim 1 , wherein the downstream port is to enable the pull-down resistor and determine device presence upon resuming from the low power state.

3. The electronic device of claim 1 , comprising, if the upstream device is connected, re-starting the timer and disabling the pull-down resistor.

4. The electronic device of claim 1 , wherein the downstream port is a Universal Serial Bus (USB) port.

5. The electronic device of claim 1 , wherein the upstream device is coupled to the downstream port by a connector and during the low power state the power consumption of the downstream port is approximately equal to the power consumption of the timer.

6. The electronic device of claim 1 , wherein the upstream device is an embedded device and, during the low power state, the embedded device remains powered and the downstream port consumes no power at the link between the downstream port and the embedded device.

7. The electronic device of claim 1 , wherein the low power state is a USB L1 or Suspend state.

8. The electronic device of claim 1 , wherein the switch is coupled in series between the pull-down resistor and a respective signal line.

9. The electronic device of claim 1 , wherein if the upstream device is disconnected, the pull-down resistor is to be kept enabled but consume no power.

10. The electronic device of claim 1 , wherein if the electronic device resumes before timer expiration, the link layer is to terminate a running of the timer and re-enable the pull-down resistor.

11. A Universal Serial Bus (USB) port, comprising:
a pull-down resistor used to determine whether a device is coupled to the USB port;
a switch coupled to the pull-down resistor, the switch to disable the pull-down resistor in response to the USB port initiating a low power state of a link between the USB port and the device, wherein the switch is controlled by input from a link layer of the USB port; and
a physical layer comprising a timer to perform periodic monitoring of the presence of the upstream device, the link layer of the USB port to start the timer upon entering the low power state and, at an expiration of the timer, enable the pull-down resistor for a predetermined amount of time to determine whether the device has been disconnected, wherein if the device is detected as present, the downstream port is to disable the pull-down resistor and restart the timer.

12. The USB port of claim 11 , wherein the USB port is to enable the pull-down resistor and determine device presence upon resuming from the low power state.

13. The USB port of claim 11 , comprising, if the device is connected, re-starting the timer and disabling the pull-down resistor.

14. The USB port of claim 11 , wherein the device is coupled to the USB port by a connector and during the low power state the power consumption of the USB port is approximately equal to the power consumption of the timer.

15. The USB port of claim 11 , wherein the USB port is a USB 2 port.

16. The USB port of claim 11 , wherein the device is an embedded device and during the low power state the embedded device remains powered and the USB port consumes no power at the link between the downstream port and the embedded device.

17. A computing device, comprising logic to:
determine device presence using a pull-down resistor disposed in a downstream port;
initiate a low power state of a link between the downstream port and an upstream device;
in response to initiating the low power state, send a control signal from a link layer of the downstream port to a switch to disable the pull-down resistor; and
in response to initiating the low power state, start a timer to perform periodic monitoring of the presence of the upstream device via the link layer of the downstream port; and
at an expiration of the timer, enable the pull-down resistor for a predetermined amount of time to determine whether the upstream device has been disconnected, wherein if the upstream device is detected as present, the downstream port is to disable the pull-down resistor and restart the timer.

18. The computing device of claim 17 , comprising logic to:
resume from the low power state; and
in response to resuming from the low power state, enable the pull-down resistor and determine device presence.

19. The computing device of claim 17 , comprising logic to:
if the device is connected, re-start the timer and disable the pull-down resistor.

20. The computing device of claim 17 , wherein the link is a Universal Serial Bus (USB) link.

Assignees

• Intel Corp

Inventors

• Chen Huimin
• Chan Kok Hong
• Phang Kian Leong
• Vadivelu Karthi

Classifications

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F1/26

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• G06F1/3278 Primary

  Power saving in modem or I/O interface · CPC title

• G06F1/3253 Primary

  Power saving in bus · CPC title

• G06F1/3215

  Monitoring of peripheral devices · CPC title