Dynamic error quantizer tuning systems and methods

Patent metadata

Field	Value
Publication number	US-11239909-B2
Application number	US-202017078337-A
Country	US
Kind code	B2
Filing date	Oct 23, 2020
Priority date	Nov 5, 2019
Publication date	Feb 1, 2022
Grant date	Feb 1, 2022

Abstract

Dynamic error-quantizer tuning systems and methods prevent misconvergence to local minima by using a dynamic quantizer circuit that controls reference voltages of three or more comparators that are independently adjusted to modify the transfer function of the dynamic quantizer circuit. A weighted sum of the comparator outputs is subtracted from the input to form an error signal in a control loop. The ratio of the reference voltages is chosen to reduce or eliminate local minima during a convergence of the control loop and is set to values that minimize a mean squared error signal with respect to discrete modulation states of the input after the convergence of the control loop is complete.

First claim

What is claimed is:

1. A dynamic quantizer circuit for preventing misconvergence of a decision-feedback control loop to a local minimum, the dynamic quantizer circuit comprising:
an input;
a control circuit that controls one or more reference voltages in a set of reference voltages; and
comparators coupled to the input, each comparator having an output and being associated with at least one of the one or more reference voltages, the reference voltages of at least two of the comparators being independently adjustable to adjust a transfer function of the dynamic quantizer circuit,
wherein a weighted sum of the outputs of the comparators is subtracted from the input to form an error signal in a control loop,
the ratio of at least two voltages in the set of reference voltages being chosen to reduce or eliminate local minima during a convergence of the control loop, and
the ratio of at least two voltages in the set of reference voltages being set to values to minimize a mean squared error signal with respect to discrete modulation states of the input after the convergence of the control loop is complete.

2. The dynamic quantizer circuit according to claim 1 , wherein the dynamic quantizer circuit, in response to detecting that an amplitude of Jones matrix coefficients is at or below a threshold, drives the control loop in a first mode of operation and, in response to determining that the control loop satisfies a convergence criterion, drives the control loop in a second mode of operation.

3. The dynamic quantizer circuit according to claim 2 , wherein the first mode of operation is one of a convergence mode or an NRZ mode, and the second mode of operation is one of a tracking mode or a PAM4 mode that is a regular mode of operation of the control loop.

4. The dynamic quantizer circuit according to claim 2 , further comprising at least one of a timer or a lock-bit that indicates that the convergence criterion has been satisfied.

5. The dynamic quantizer circuit according to claim 1 , further comprising a current mode summation of one or more differential pair amplifiers in a set of differential pair amplifiers.

6. The dynamic quantizer circuit according to claim 5 , wherein the one or more reference voltages are applied to differential base input terminals of the one or more differential pair amplifiers to offset zero-crossing points of less than all of the one or more differential pair amplifiers in the set of differential pair amplifiers.

7. The dynamic quantizer circuit according to claim 6 , further comprising a digital-to-analog converter circuit that adjusts the one or more reference voltages, the reference voltages defining zero-crossing points of two differential amplifiers.

8. The dynamic quantizer circuit according to claim 4 , wherein the one or more reference voltages are dynamically adjusted to cause the quantizer to transition between two or more modes.

9. The dynamic quantizer circuit according to claim 1 , further comprising an adaptation circuit that controls a complex coefficient.

10. The dynamic quantizer circuit according to claim 9 , further comprising an analog complex multiplier that multiplies the complex coefficient with an input signal, the complex coefficient being a coefficient of a complex 2×2 matrix.

11. The dynamic quantizer circuit according to claim 9 , further comprising an analog least mean square loop that adjusts the complex coefficient to correct for a polarization and phase rotation in an optical channel.

12. The dynamic quantizer circuit according to claim 1 , further comprising a ramp generator to generate a ramp from an initial voltage to a target voltage, the ramp being asymmetric around a zero value.

13. A dynamic error-quantizer tuning method for preventing misconvergence of a control loop to a local minimum, the method comprising:
using a control circuit that controls one or more reference voltages in a set of reference voltages to adjust reference voltages of at least two comparators to adjust a transfer function of a dynamic quantizer circuit, each comparator being coupled to an input, having an output, and being associated with at least one of the one or more reference voltages;
subtracting from the input a weighted sum of the outputs of the comparators to obtain an error signal in a control loop;
selecting a ratio of at least two voltages in the set of reference voltages such as to reduce or eliminate local minima during a convergence of the control loop; and
setting the ratio of at least two voltages in the set of reference voltages to values to minimize a mean squared error signal with respect to discrete modulation states of the input after the convergence of the control loop is complete.

14. The method according to claim 13 , further comprising causing an error detection circuit, which determines an error as a distance between a signal and a quantized signal, to drive the control loop in a first mode and, in response to determining that the control loop satisfies a convergence criterion, causing a transition of the error detection circuit to driving the control loop in a second mode to reduce the error, the error being capable of causing a tap weight noise.

15. The method according to claim 14 , further comprising, in response to detecting that an amplitude of Jones matrix coefficients is at or below a threshold, causing the error detection circuit to transition to the first mode.

16. The method according to claim 14 , wherein the first mode is one of a convergence mode or an NRZ mode, and the second mode is one of a tracking mode or a PAM4 mode that is a regular mode of the control loop.

17. The method according to claim 14 , wherein the error detection circuit drives an adaptation circuit that controls a complex coefficient that represents a tap weight.

18. The method according to claim 17 , using an analog least mean square (LMS) loop to adjust the complex coefficient to correct for a polarization and phase rotation in an optical channel.

19. The method according to claim 18 , wherein the analog LMS loop corrects for polarization and phase rotation by using an analog complex multiplier.

20. The method according to claim 19 , wherein the signal has been mapped to a quantized version that is closer to nearest modulation symbol than the signal itself.

Assignees

• Maxim Integrated Products

Inventors

• Razzell Charles

Classifications

• H04B10/6166

  Polarisation demultiplexing, tracking or alignment of orthogonal polarisation components · CPC title

• H04B10/6165

  Estimation of the phase of the received optical signal, phase error estimation or phase error correction · CPC title

• H04B10/697

  Arrangements for reducing noise and distortion · CPC title

• H04B10/077

  using a supervisory or additional signal · CPC title

• H04B10/6162 Primary

  Compensation of polarization related effects, e.g., PMD, PDL · CPC title