Optoelectronic module package

Patent metadata

Field	Value
Publication number	US-11239377-B2
Application number	US-201816056340-A
Country	US
Kind code	B2
Filing date	Aug 6, 2018
Priority date	Aug 7, 2017
Publication date	Feb 1, 2022
Grant date	Feb 1, 2022

Abstract

An optoelectronic module. In some embodiments, the optoelectronic module includes: a substrate; a digital integrated circuit, on an upper surface of the substrate; and a frame, secured in a pocket of the substrate. The pocket is in a lower surface of the substrate, and the substrate includes an insulating layer, and a plurality of conductive traces.

First claim

What is claimed is:

1. An optoelectronic module, comprising:
a substrate;
a digital integrated circuit, on an upper surface of the substrate;
a frame, secured in a pocket of the substrate, the pocket being in a lower surface of the substrate opposite to the upper surface of the substrate, the frame comprising a first part entirely in the pocket and a second part extending from the first part, the substrate overlapping the entire first part and not overlapping the second part;
a photonic integrated circuit; and
an analog integrated circuit, connected to the photonic integrated circuit, and to the digital integrated circuit, the analog integrated circuit being connected to the digital integrated circuit through the substrate,
the frame being composed of a material having a thermal conductivity greater than 10 W/m/K,
the substrate comprising:
an insulating layer; and
a plurality of conductive traces, and

the digital integrated circuit being connected to conductive traces in the substrate through a first array of contacts.

2. The optoelectronic module of claim 1 , wherein the substrate further comprises a copper layer on a surface of the pocket parallel to the lower surface of the substrate.

3. The optoelectronic module of claim 1 , further comprising a carrier secured to an upper surface of the frame,
the photonic integrated circuit and the analog integrated circuit being secured to an upper surface of the carrier,
the carrier comprising an insulating layer and a plurality of thermal vias forming a thermal path from the analog integrated circuit to the frame.

4. The optoelectronic module of claim 3 , wherein:
the photonic integrated circuit is connected to the analog integrated circuit by first wire bonds, and
the analog integrated circuit is connected to the substrate by second wire bonds.

5. The optoelectronic module of claim 4 , further comprising a heater, in or on the photonic integrated circuit, wherein a total thermal conductivity between the photonic integrated circuit and the frame is less than 10 mW/K.

6. The optoelectronic module of claim 4 , further comprising a heater patterned in metal traces on the carrier.

7. The optoelectronic module of claim 1 , further comprising an optical fiber, wherein:
the photonic integrated circuit has a V-groove, and
an end of the optical fiber is in the V-groove.

8. The optoelectronic module of claim 1 , further comprising a carrier secured to an upper surface of the frame,
the optoelectronic module comprising an optoelectronic subassembly comprising:
the photonic integrated circuit;
the analog integrated circuit;
the carrier; and
an optical fiber, coupled to an optical waveguide on the photonic integrated circuit,

the optoelectronic subassembly having a plurality of contact pads for establishing electrical connections between the analog integrated circuit and test equipment probes, the optoelectronic subassembly being configured to be separately testable by supplying power to the optoelectronic subassembly through one or more of the contact pads and sending data to and and/or receiving data from the optoelectronic subassembly through one or more of the contact pads.

9. The optoelectronic module of claim 1 , wherein the digital integrated circuit is secured to the substrate by the first array of contacts, and the lower surface of the substrate has a second array of contacts.

10. The optoelectronic module of claim 9 , wherein the second array of contacts has a coarser pitch than the first array of contacts.

11. The optoelectronic module of claim 10 , further comprising a lid, on, and in thermal contact with, an upper surface of the digital integrated circuit, the lid comprising a material having a thermal conductivity of at least 10 W/m/K.

12. An optoelectronic module, comprising:
a substrate;
a digital integrated circuit, on an upper surface of the substrate; and
a frame, secured in a pocket of the substrate, the pocket being in a lower surface of the substrate;
a carrier secured to an upper surface of the frame;
a photonic integrated circuit secured to an upper surface of the carrier;
an analog integrated circuit secured to the upper surface of the carrier; and
a heater in or on the photonic integrated circuit, wherein a total thermal conductivity between the photonic integrated circuit and the frame is less than 10 m W/K,
the photonic integrated circuit being connected to the analog integrated circuit by first wire bonds,
the analog integrated circuit being connected to the substrate by second wire bonds, connected to the photonic integrated circuit, and connected to the digital integrated circuit,
the frame being composed of a material having a thermal conductivity greater than 10 W/m/K,
the substrate comprising:
an insulating layer, and
a plurality of conductive traces,

the carrier comprising an insulating layer, a plurality of thermal vias forming a thermal path from the analog integrated circuit to the frame, and a plurality of conductive traces,
the heater being connected to the carrier by third wire bonds, and
the carrier being connected to the substrate by fourth wire bonds.

13. An optoelectronic module, comprising:
a substrate;
a digital integrated circuit, on an upper surface of the substrate;
a frame, secured in a recess of the substrate, the recess being in a lower surface of the substrate opposite to the upper surface of the substrate and extending part way through the substrate from the lower surface of the substrate towards the upper surface of the substrate, the substrate overlapping the recess;
a photonic integrated circuit; and
an analog integrated circuit, connected to the photonic integrated circuit, and to the digital integrated circuit, the analog integrated circuit being connected to the digital integrated circuit through the substrate,
the frame being composed of a material having a thermal conductivity greater than 10 W/m/K,
the substrate comprising:
an insulating layer; and
a plurality of conductive traces, and

the digital integrated circuit being connected to conductive traces in the substrate through a first array of contacts.

Assignees

• Rockley Photonics Ltd

Inventors

• Byrd Gerald Cois
• Schrans Thomas Pierre
• Chou Chia-Te
• Abed Arin
• Bchir Omar James

Classifications

• H10W90/401

  characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W20/4424

  Copper alloys · CPC title

• H10F77/933

  for devices having potential barriers · CPC title

• H10F77/953 Primary

  for devices having potential barriers · CPC title