Methods of forming a semiconductor device

Patent metadata

Field	Value
Publication number	US-11239240-B2
Application number	US-202016902783-A
Country	US
Kind code	B2
Filing date	Jun 16, 2020
Priority date	Aug 22, 2018
Publication date	Feb 1, 2022
Grant date	Feb 1, 2022

Abstract

A semiconductor device comprises semiconductive pillars; digit lines laterally between the semiconductive pillars; nitride caps vertically overlying the digit lines; nitride structures overlying surfaces of the nitride caps; redistribution material structures comprising upper portions overlying upper surfaces of the nitride caps and the nitride structures, and lower portions overlying upper surfaces of the semiconductive pillars; a low-K dielectric material laterally between the digit lines and the semiconductive pillars; air gaps laterally between the low-K dielectric material and the semiconductive pillars, and having upper boundaries below the upper surfaces of the nitride caps; and a nitride dielectric material laterally between the air gaps and the semiconductive pillars. Memory devices, electronic systems, and method of forming a semiconductor device are also described.

First claim

What is claimed is:

1. A method of forming a semiconductor device, comprising:
forming a semiconductive device structure comprising semiconductive pillars, digit lines between the semiconductive pillars, nitride caps overlying the digit lines and having upper surfaces offset from upper surfaces of the semiconductive pillars, and dielectric stacks extending between the semiconductive pillars and the digit lines and each comprising a low-K dielectric material, an oxide material, and a nitride material;
forming nitride structures over surfaces of the nitride caps and the oxide material;
forming redistribution material structures over exposed surfaces of the semiconductive pillars, the nitride structures, and the nitride caps;
selectively removing portions of the nitride structures not covered by the redistribution material structures to partially uncover the oxide material;
forming another nitride material over exposed surfaces of the redistribution material structures, the nitride structures, and the oxide material;
selectively removing portions of the another nitride material overlying the oxide material;
selectively removing portions of the oxide material to form air gaps between the digit lines and remainders of the semiconductive pillars; and
forming an isolation material over exposed surfaces of the redistribution material structures and the another nitride material while substantially maintaining the air gaps.

2. The method of claim 1 , wherein forming a semiconductive device structure comprises forming the upper surfaces of the semiconductive pillars to be vertically recessed relative to the upper surfaces of the nitride caps by a distance within a range of from about one-fourth to about one-third a height of the nitride caps.

3. The method of claim 1 , further comprising selecting the low-K dielectric material to comprise one or more of SiO x C y , SiO x N y , SiC x O y H z , and SiO x C y N z.

4. The method of claim 1 , wherein forming nitride structures over surfaces of the nitride caps and the oxide material comprises:
recessing the oxide material relative to the upper surfaces of the semiconductive pillars;
forming an additional nitride material over exposed surfaces of the semiconductive pillars, the nitride caps, the low-K dielectric material, the oxide material, and the nitride material; and
removing portions of the additional nitride material and the semiconductive pillars to form the nitride structures and further recess the semiconductive pillars.

5. The method of claim 4 , wherein recessing the oxide material relative to the upper surfaces of the semiconductive pillars comprises selectively removing an upper portion of the oxide material to vertically recess upper surfaces of the oxide material from the upper surfaces of the semiconductive pillars by a distance within a range of from about one-fourth to about one-third a height of the nitride caps.

6. The method of claim 4 , wherein forming an additional nitride material over exposed surfaces of the semiconductive pillars, the nitride caps, the low-K dielectric material, the oxide material, and the nitride material comprises conformally forming the additional nitride material over the exposed surfaces of the semiconductive pillars, the nitride caps, the low-K dielectric material, the oxide material, and the nitride material.

7. The method of claim 4 , wherein removing portions of the additional nitride material and the semiconductive pillars comprises selectively anisotropically etching portions of the additional nitride material overlying the semiconductive pillars and upper portions of the semiconductive pillars thereunder.

8. The method of claim 1 , wherein forming redistribution material structures over exposed surfaces of the semiconductive pillars, the nitride structures, and the nitride caps comprises forming the redistribution material structures to exhibit lower portions overlying upper boundaries of the semiconductive pillars and upper portions laterally offset from the lower portions and overlying upper boundaries of the nitride structures and the nitride caps.

9. The method of claim 8 , wherein selectively removing portions of the nitride structures not covered by the redistribution material comprises forming undercut regions laterally extending underneath the upper portions of the redistribution material structures.

10. The method of claim 1 , wherein forming another nitride material over exposed surfaces of the redistribution material structures, the nitride structures, and the oxide material comprises conformally depositing the another nitride material over the exposed surfaces of the redistribution material structures, the nitride structures, and the oxide material.

11. The method of claim 1 , wherein selectively removing portions of the another nitride material overlying the oxide material comprises selectively anisotropically dry etching the portions of the another nitride material.

12. The method of claim 1 , wherein selectively removing portions of the oxide material to form air gaps between the digit lines and remainders of the semiconductive pillars comprises forming the air gaps to vertically extend from upper boundaries below the upper surfaces of the nitride caps to lower boundaries below lower surfaces of the digit lines.

13. The method of claim 1 , wherein forming an isolation material over exposed surfaces of the redistribution material structures and the another nitride material while substantially maintaining the air gaps comprises non-conformally depositing the isolation material.

14. The method of claim 1 , further comprising forming capacitors over and in electrical contact with uppermost surfaces of the redistribution material structures.

15. A method of forming a semiconductor device, comprising:
forming a semiconductive device structure, the semiconductive device structure comprising:
semiconductive pillars;
digit lines between the semiconductive pillars;
nitride caps on upper surfaces of the digit lines;
low-K dielectric structures on side surfaces of the digit lines and the nitride caps;
oxide dielectric structures on side surfaces of the low-K dielectric structures; and
nitride dielectric structures extending from and between opposing side surfaces of the oxide dielectric structures and the semiconductive pillars;
recessing the oxide dielectric structures;
forming a nitride dielectric material on the semiconductive pillars, the nitride caps, the low-K dielectric structures, the recessed oxide dielectric structures, and the nitride dielectric structures;
removing portions of the nitride dielectric material and portions of the semiconductive pillars to form additional dielectric nitride structures and recess the semiconductive pillars;
forming redistribution material structures on the recessed semiconductive pillars, the additional dielectric nitride structures, and the nitride caps; and
removing portions of the recessed oxide dielectric structures to form air gaps between the digit lines and the recessed semiconductive pillars.

16. The method of claim 15 , further comprising forming silicide structures on the recessed semiconductive pillars prior to forming the redistribution material structures.

17. The method of claim 16 , wherein forming redistribution material structures comprises forming the redistribution material structures to comprise vertically lower portions on the silicide structures and vertically upper portions partially horizontally offset from the vertically lower portions and on upper surfaces of the additional dielectric nitride struc

Assignees

• Micron Technology Inc

Inventors

• Simsek-Ege Arzum F
• Yang Guangjun
• Wang Kuo-Chen
• Akhtar Mohd Kamran
• Koge Katsumi

Classifications

• H10W10/021

  of air gaps · CPC title

• H10W10/20

  Air gaps · CPC title

• G11C11/4087

  Address decoders, e.g. bit - or word line decoders; Multiple line decoders · CPC title

• G11C11/4091

  Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating · CPC title

• H01L21/764

  Electricity · mapped topic