Efficient sharing of non-volatile memory

Patent metadata

Field	Value
Publication number	US-11231852-B2
Application number	US-201715845723-A
Country	US
Kind code	B2
Filing date	Dec 18, 2017
Priority date	Dec 18, 2017
Publication date	Jan 25, 2022
Grant date	Jan 25, 2022

Abstract

In the embodiment a determination is made, for one or more applications being executed by the computing system, of an amount of the first or second memory being used by the one or more applications. Based on the determination, a portion of the memory resources of the third memory are configured to function with the first or second memory when it is determined that the amount of the first or second memory being used by the one or more applications is not sufficient for the memory needs of the one or more applications and a portion of the memory resources of the third memory are removed from functioning with the first or second memory when it is determined that the amount of the first or second memory being used by the one or more applications is more than is needed for the memory needs of the one or more applications.

First claim

What is claimed is:

1. A computing system configured to dynamically share memory across other memory types, the computing system comprising:
a first memory that is of a first type of memory;
a second memory that is of a second type of memory that is different from the first type, the first type of memory being faster than the second type of memory;
a third memory that is of a third type of memory that is different from the first type of memory and the second type of memory, the third type of memory being faster than the second type of memory, but slower than the first type of memory;
one or more processors;
one or more computer-readable hardware storage devices having stored thereon computer-executable instructions that are structured to be executable by the one or more processors to thereby cause the computing system to:
configure the first memory as part of main memory of an operating system that executes one or more applications;
configure the second memory to be accessible by a file system of the operating system;
dynamically configure a first portion of the third memory as part of the main memory and a second portion of the third memory as part of write cache memory for accelerating access to the second memory, the dynamic configuration of the third memory comprising:
determining, for the one or more applications being executed by the operating system, an amount of the main memory or an amount of write cache memory being used by the one or more applications based on a value associated with at least one of the one or more applications, the value being a part of a sliding scale, such that a lower value is indicative of read heavy, and a higher value is indicative of write heavy; and
based on the determination of the amount of the main memory or the amount of the write cache memory being used by the one or more applications:
reconfiguring a first sub-portion of the first portion of the third memory from being part of main memory to being part of the write cache memory when it is determined that the amount of the write cache memory is not sufficient for executing the one or more applications; or
reconfiguring a second sub-portion of the second portion of the third memory from being part of the write cache memory to being part of the main memory when it is determined that a total amount of the main memory is insufficient for executing the one or more applications.

2. The computing system according to claim 1 , wherein the first memory is volatile main memory and the second memory is solid state storage memory.

3. The computing system according to claim 2 , wherein the second portion of the third memory is configured to function with the second memory as the write cache memory.

4. The computing system according to claim 1 , wherein the determination of the amount of the first or second memory being used by the one or more applications is based on a first and second threshold,
wherein the first sub-portion of the third memory is removed from functioning with the first memory as main memory when the first threshold is reached, and
wherein the second sub-portion of the third memory is reconfigured to function with the first memory as main memory when the second threshold is reached.

5. The computing system according to claim 4 , wherein a buffer region is formed between the first and second thresholds, the buffer region being configured to account for small changes in the amount the first or second memory being used by the one or more applications without a need to configure or remove any sub-portion of the third memory.

6. The computing system in according to claim 4 , wherein the one or more applications specify values of the first and second thresholds.

7. The computing system according to claim 1 , wherein the one or more processors include one of a field programmable gate array (FPGA), an application specific integrated circuit (ASIC).

8. The computing system according to claim 1 , wherein the computer executable instructions include hard coded logic gates.

9. A method for dynamically sharing non volatile memory of a computing system across other memory types, the computing system comprising:
a first memory that is a first type of memory;
a second memory that is of a second type that is different from the first type;
a third memory that is of a third type of memory that is different from the first type of memory and the second type of memory, the third type of memory being faster than the second type of memory, but slower than the first type of memory;

the method comprising:
configuring the first memory as part of main memory of an operating system that executes one or more applications;
configuring the second memory to be accessible by a file system of the operating system;
dynamically configuring a first portion of the third memory as part of the main memory and a second portion of the third memory as part of write cache memory for accelerating access to the second memory, the dynamic configuration of the third memory comprising
determining, for the one or more applications being executed by the operating system, an amount of the main memory or an amount of write cache memory being used by the one or more applications based on a value associated with at least one of the one or more applications, the value being a part of a sliding scale, such that a lower value is indicative of read heavy, and a higher value is indicative of write heavy;
based on the determination of the amount of the main memory or the cache memory being used by the one or more applications:
causing a first sub-portion of the first portion of the third memory that is configured to function as the main memory to be reconfigured to function as the write cache memory and to be added to the write cache memory when it is determined that the amount of the write cache memory being used by the one or more applications is not sufficient for the one or more applications; or
causing a second sub-portion of the second portion of the third memory that is configured to function as the write cache memory to be removed from the persistent write cache memory when it is determined that the amount of the main memory is insufficient for executing the one or more applications.

10. The method according to claim 9 , wherein the first memory is volatile main memory and the second memory is solid state storage memory.

11. The method according to claim 10 , wherein the second portion of the third memory is configured to function with the second memory as the write cache memory.

12. The method according to claim 9 , wherein the determination of the amount of the first or second memory being used by the one or more applications is based on a first and second threshold,
wherein the first sub-portion of the third memory is removed from functioning with the first memory as main memory when the first threshold is reached, and
wherein the second sub-portion of the third memory is reconfigured to function with the first memory as main memory when the second threshold is reached.

13. The method according to claim 12 , wherein a buffer region is formed between the first and second thresholds, the buffer region being configured to account for small changes in the amount the first or second memory being used by the one or more applications without a need to configure or remove any sub-portion of the third memory.

14. The method according to claim 13 , wherein the one or more applications specify values of the first and second thresholds by specifying if the one or more applications are read heavy or write heavy.

15. The method according to claim

Assignees

• Microsoft Technology Licensing Llc

Inventors

• Badam Anirudh
• Govindan Sriram
• Sharma Bikash
• Khessib Badriddine
• Narayanan Iyswarya
• Ganesan Aishwarya

Classifications

• G06F9/5016 Primary

  the resource being the memory · CPC title

• G06F3/0685

  Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays · CPC title

• G06F3/0631

  by allocating resources to storage systems · CPC title

• G06F12/0802

  Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches · CPC title

• G06F3/0604 Primary

  Improving or facilitating administration, e.g. storage management · CPC title