Technologies for dynamic allocation of tiers of disaggregated memory resources

US2018024867A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2018024867-A1
Application numberUS-201715639037-A
CountryUS
Kind codeA1
Filing dateJun 30, 2017
Priority dateJul 22, 2016
Publication dateJan 25, 2018
Grant date

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Abstract

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Technologies for dynamically allocating tiers of disaggregated memory resources include a compute device. The compute device is to obtain target performance data, determine, as a function of target performance data, memory tier allocation data indicative of an allocation of disaggregated memory sleds to tiers of performance, in which one memory sled of one tier is to act as a cache for another memory sled of a subsequent tier, send the memory tier allocation data and the target performance data to the corresponding memory sleds through a network, receive performance notification data from one of the memory sleds in the tiers, and determine, in response to receipt of the performance notification data, an adjustment to the memory tier allocation data.

First claim

Opening claim text (preview).

1 . A compute device comprising: one or more processors; and a memory having stored therein a plurality of instructions that, when executed by the one or more processors, cause the compute device to: obtain target performance data indicative of a performance metric to be monitored and a corresponding performance threshold to be satisfied as a workload is executed; determine, as a function of the target performance data, memory tier allocation data indicative of an allocation of disaggregated memory sleds to tiers of performance, in which one memory sled of one tier is to act as a cache for another memory sled of a subsequent tier; send the memory tier allocation data and the target performance data to the corresponding memory sleds through a network; receive performance notification data from one of the memory sleds in the tiers, wherein the performance notification data is indicative of whether the memory sled has satisfied the performance threshold; and determine, in response to receipt of the performance notification data, an adjustment to the memory tier allocation data. 2 . The compute device of claim 1 , wherein to determine the memory tier allocation data comprises to determine a memory sled for a primary tier to act as a cache for a subsequent tier as a function of types and amounts of memory available on the memory sleds. 3 . The compute device of claim 2 , wherein to determine a memory sled for a primary tier comprises to select a memory sled having a faster type of memory than the memory sled for the subsequent tier. 4 . The compute device of claim 3 , wherein to select a memory sled for the primary tier comprises to select a memory sled having available dynamic random access memory. 5 . The compute device of claim 1 , wherein to receive the performance notification data comprises to receive a performance notification that a memory sled has overperformed relative to the performance threshold. 6 . The compute device of claim 1 , wherein to receive the performance notification data comprises to receive a performance notification that a memory sled has underperformed relative to the performance threshold. 7 . The compute device of claim 1 , wherein to determine an adjustment to the memory tier allocation data comprises to reassign a tier from a first memory sled to a second memory sled, wherein the second memory sled has memory that is faster than the first memory sled. 8 . The compute device of claim 1 , wherein to determine an adjustment to the memory tier allocation data comprises to reassign a tier from a first memory sled to a second memory sled, wherein the second memory sled has memory that is slower than the first memory sled. 9 . The compute device of claim 1 , wherein to determine an adjustment to the memory tier allocation data comprises to change an amount of memory in a memory sled to be allocated to a workload. 10 . The compute device of claim 1 , wherein the plurality of instructions, when executed, further cause the compute device to send the adjusted memory tier allocation data to the memory sleds. 11 . The compute device of claim 1 , wherein to send the memory tier allocation data comprises to send an indication of the amount of memory to allocate for each of multiple workloads. 12 . The compute device of claim 1 , wherein to send the memory tier allocation data comprises to send identifiers of the memory sleds and the corresponding tiers to enable memory access requests to be routed from a memory sled in one tier to another memory sled in a subsequent tier. 13 . One or more machine-readable storage media comprising a plurality of instructions stored thereon that, when executed by a compute device cause the compute device to: obtain target performance data indicative of a performance metric to be monitored and a corresponding performance threshold to be satisfied as a workload is executed; determine, as a function of the target performance data, memory tier allocation data indicative of an allocation of disaggregated memory sleds to tiers of performance, in which one memory sled of one tier is to act as a cache for another memory sled of a subsequent tier; send the memory tier allocation data and the target performance data to the corresponding memory sleds through a network; receive performance notification data from one of the memory sleds in the tiers, wherein the performance notification data is indicative of whether the memory sled has satisfied the performance threshold; and determine, in response to receipt of the performance notification data, an adjustment to the memory tier allocation data. 14 . The one or more machine-readable storage media of claim 13 , wherein to determine the memory tier allocation data comprises to determine a memory sled for a primary tier to act as a cache for a subsequent tier as a function of types and amounts of memory available on the memory sleds. 15 . The one or more machine-readable storage media of claim 14 , wherein to determine a memory sled for a primary tier comprises to select a memory sled having a faster type of memory than the memory sled for the subsequent tier. 16 . The one or more machine-readable storage media of claim 15 , wherein to select a memory sled for the primary tier comprises to select a memory sled having available dynamic random access memory. 17 . The one or more machine-readable storage media of claim 13 , wherein to receive the performance notification data comprises to receive a performance notification that a memory sled has overperformed relative to the performance threshold. 18 . The one or more machine-readable storage media of claim 13 , wherein to receive the performance notification data comprises to receive a performance notification that a memory sled has underperformed relative to the performance threshold. 19 . The one or more machine-readable storage media of claim 13 , wherein to determine an adjustment to the memory tier allocation data comprises to reassign a tier from a first memory sled to a second memory sled, wherein the second memory sled has memory that is faster than the first memory sled. 20 . The one or more machine-readable storage media of claim 13 , wherein to determine an adjustment to the memory tier allocation data comprises to reassign a tier from a first memory sled to a second memory sled, wherein the second memory sled has memory that is slower than the first memory sled. 21 . The one or more machine-readable storage media of claim 13 , wherein to determine an adjustment to the memory tier allocation data comprises to change an amount of memory in a memory sled to be allocated to a workload. 22 . The one or more machine-readable storage media of claim 13 , wherein the plurality of instructions, when executed, further cause the compute device to send the adjusted memory tier allocation data to the memory sleds. 23 . The one or more machine-readable storage media of claim 13 , wherein to send the memory tier allocation data comprises to send an indication of the amount of memory to allocate for each of multiple workloads. 24 . A method for dynamically allocating tiers of disaggregated memory resources, the method comprising: obtaining, by a compute device, target performance data indicative of a performance metric to be monitored and a corresponding performance threshold to be satisfied as a workload is executed; determining, by the compute device and as a function of the targe

Assignees

Inventors

Classifications

  • G06F15/161Primary

    Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning (casings, cabinets, racks or drawers for data centers H05K5/00) · CPC title

  • Latency reduction · CPC title

  • bandwidth management, e.g. capacity management · CPC title

  • Optical control · CPC title

  • Resource optimization · CPC title

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What does patent US2018024867A1 cover?
Technologies for dynamically allocating tiers of disaggregated memory resources include a compute device. The compute device is to obtain target performance data, determine, as a function of target performance data, memory tier allocation data indicative of an allocation of disaggregated memory sleds to tiers of performance, in which one memory sled of one tier is to act as a cache for another …
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F15/161. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jan 25 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).