System and method for determining a primary switching event in an isolated converter

Patent metadata

Field	Value
Publication number	US-11223284-B2
Application number	US-202016779459-A
Country	US
Kind code	B2
Filing date	Jan 31, 2020
Priority date	Jan 31, 2020
Publication date	Jan 11, 2022
Grant date	Jan 11, 2022

Abstract

Disclosed is a system for determining a primary switching event in an isolated converter having a primary-side and a secondary-side. The system includes a primary-switch (PS) on the primary-side, a synchronous rectifier (SR) on the secondary-side, an integration circuit, and a SR controller. The integration circuit is in signal communication with the SR on the secondary-side and the SR controller is in signal communication with the SR and the integration circuit. The SR is configured to produce a drain-to-source voltage (VDS) and the integration circuit is configured to integrate a difference between the VDS and a output voltage (VOut) (produced by the secondary-side) over time to produce a VDS over time value (VTime). The SR controller is configured to determine if the VDS is greater than a first threshold voltage (VTH) and determine the primary switching event when the VTime is greater than a second threshold voltage (VSTH).

First claim

We claim:

1. A method for determining a current primary switching event for a primary-side switch transistor in a flyback converter, the method comprising:
integrating a difference between a drain-to-source voltage of a synchronous rectifier switch transistor and an output voltage over time to produce a volt-second value while the drain-to-source voltage is greater than a first threshold voltage;
adapting an adaptive voltage responsive to the volt-second value;
adapting a second threshold voltage to equal a high-level voltage in response to a detection of a previous primary switching event and to equal the adaptive voltage following a switching-off of the synchronous rectifier switch transistor; and
detecting the current primary switching event responsive to the volt-second value being greater than the second threshold voltage.

2. The method of claim 1 , wherein the high-level voltage is proportional to the output voltage.

3. The method of claim 1 , wherein the difference between the drain-to-source voltage and the output voltage is a difference between the drain-to-source voltage and a scaling factor (k) times the output voltage.

4. The method of claim 1 , wherein the volt-second value following the switching off of the synchronous rectifier switch transistor equals a series of volt-second values corresponding to a series of resonant oscillations for the drain-to-source voltage, and wherein adapting the adaptive voltage comprises:
for an initial first resonant oscillation of the drain-to-source voltage, setting the adaptive voltage to equal a first volt-second value for the initial resonant oscillation plus a predetermined offset value; and
for a second resonant oscillation following the initial resonant oscillation, setting the adaptive voltage to equal a second volt-second value for the second resonant oscillation plus the predetermined offset value.

5. The method of claim 4 , further comprising switching on the synchronous rectifier switch transistor responsive to the drain-to-source voltage discharging following the detection of the previous primary switching event.

6. The method of claim 5 , wherein the high-level voltage is greater than the first volt-second value.

7. The method of claim 5 , wherein the high-level voltage is proportional to the output voltage.

8. The method of claim 4 , wherein the second volt-second value is less than the first volt-second value.

9. The method of claim 8 , wherein the adapting the adaptive voltage further includes clamping the adaptive voltage to a minimum value.

10. The method of claim 9 , wherein the clamping of the adaptive voltage occurs after the setting of the adaptive voltage to equal the second volt-second value.

11. The method of claim 9 , wherein integrating the difference comprising charging a capacitor with a current that is proportional to the difference.

12. A system for a flyback converter, comprising:
an integration circuit configured to integrate a difference between a drain-to-source voltage for a synchronous rectifier switch transistor and an output voltage over time to produce a volt-second value when the drain-to-source voltage is greater than a first threshold voltage; and
an SR controller configured to detect a current primary switching event for a primary-side power switch when the volt-second value is greater than a second threshold voltage, wherein the SR controller is further configured to adapt the second threshold voltage to equal a high-level voltage responsive to a detection of a previous primary switching event for the primary-side power switch and to equal a function of the volt-second value following a switching-off of the synchronous rectifier switch transistor.

13. The system of claim 12 , wherein the first threshold voltage is proportional to the output voltage.

14. The system of claim 12 , wherein the difference between the drain-to-source voltage and the output voltage is a difference between the drain-to-source voltage and a scaling factor (k) times the output voltage.

15. The system of claim 12 , wherein the volt-second value following the switching off of the synchronous rectifier switch transistor equals a series of volt-second values corresponding to a series of resonant oscillations for the drain-to-source voltage, and wherein the function of the volt-second value equals a first volt-second value for a first one of the resonant oscillations plus a predetermined offset value and equals a second volt-second value for the second one of the resonant oscillations plus the predetermined offset value.

16. The system of claim 15 , wherein the SR controller is further configured to switch off the synchronous rectifier switch transistor responsive to a discharge of the drain-to-source voltage following the detection of the previous primary switching event.

17. The system of claim 15 , wherein the second volt-second value is less than the first volt-second value.

18. The system of claim 17 , wherein the SR controller is further configured to clamp the second threshold voltage to a minimum value.

19. The system of claim 18 , wherein the SR controller is further configured to clamp the second threshold voltage after the second one of the resonant oscillations.

20. The system of claim 12 , wherein the SR controller includes the integration circuit.

Assignees

• Dialog Semiconductor Inc

Inventors

• Xu Kuangzhe
• Kong Pengju
• Zhang Jiandong
• Bui Hien

Classifications

• H02M3/33576 Primary

  having at least one active switching element at the secondary side of an isolation transformer · CPC title

• H02M3/33523 Primary

  with galvanic isolation between input and output of both the power stage and the feedback loop · CPC title

• H02M1/32

  Means for protecting converters other than automatic disconnection · CPC title

• H02M1/0048

  Circuits or arrangements for reducing losses (using snubbers H02M1/34) · CPC title

• H02M3/33507

  with automatic control of the output voltage or current, e.g. flyback converters (H02M3/33561, H02M3/33569 take precedence) · CPC title