Adaptive synchronous rectifier sensing deglitch

Patent metadata

Field	Value
Publication number	US-10063159-B1
Application number	US-201715640315-A
Country	US
Kind code	B1
Filing date	Jun 30, 2017
Priority date	Jun 30, 2017
Publication date	Aug 28, 2018
Grant date	Aug 28, 2018

Abstract

A synchronous rectifier controller for controlling the on and off periods of a synchronous rectifier switch transistor in a switching power converter. In particular, the synchronous rectifier controller is configured to adaptively enable and disable a deglitch filter for filtering a turn-on signal for the synchronous rectifier switch transistor. In this fashion, the synchronous rectifier switch transistor may be switched on more rapidly during periods when the deglitch filter is disabled for greater efficiency yet the switching power converter is protected by the deglitch filter when it is not disabled.

First claim

We claim:

1. A synchronous rectifier (SR) controller, comprising:
a deglitch filter for filtering a drain-to-source voltage for an SR switch transistor to produce a filtered version of the drain-to-source voltage;
a multiplexer for selecting between the filtered version of the drain-to-source voltage and the drain-to-source voltage to provide an output signal;
a deglitch control circuit configured to control the multiplexer to select for the drain-to-source voltage responsive to a detection that a power switch connected to a primary winding for a flyback converter has been switched on; and
a first comparator configured to assert a switch-on signal for the SR switch transistor responsive to the output signal being less than an SR-on threshold voltage.

2. The SR controller of claim 1 , wherein the deglitch control circuit is further configured to integrate a function of the drain-to-source voltage to determine whether the power switch has been switched on.

3. The SR controller of claim 2 , wherein the function equals the drain-to-source voltage minus a product of a coefficient k with an output voltage for the flyback converter.

4. The SR controller of claim 3 , wherein k equals two.

5. The SR controller of claim 1 , wherein the SR controller is further configured to control the multiplexer to select for the filtered version of the drain-to-source voltage responsive to a switching on of the SR switch transistor.

6. The SR controller of claim 1 , wherein the SR controller is further configured to control the multiplexer to select for the filtered version of the drain-to-source voltage responsive to an expiration of a delay following a switching on of the SR switch transistor.

7. The SR controller of claim 1 , wherein the SR controller is further configured to control the multiplexer to select for the filtered version of the drain-to-source voltage responsive to switching off of the SR switch transistor.

8. The SR controller of claim 1 , wherein the SR controller is further configured to control the multiplexer to select for the filtered version of the drain-to-source voltage responsive to an expiration of a delay following a switching off of the SR switch transistor.

9. The SR controller of claim 1 , further comprising
a latch configured to be set by the assertion of the switch-on signal; and
a gate driver configured to charge a gate of the SR switch transistor responsive to a set of the latch.

10. The SR controller of claim 9 , further comprising:
a second comparator configured to reset the latch responsive to the output signal exceeding an SR-off threshold voltage, wherein the gate driver is further configured to discharge the gate of the SR switch transistor responsive to a reset of the latch.

11. A synchronous rectifier (SR) controller, comprising:
a deglitch filter for filtering a drain-to-source voltage for an SR switch transistor responsive to an adaptive delay to produce a filtered version of the drain-to-source voltage;
a deglitch control circuit configured to control the adaptive delay to equal a first value responsive to a detection that a power switch connected to a primary winding for a flyback converter has been switched on; and
a first comparator configured to assert a switch-on signal for the SR switch transistor responsive to the filtered version of the drain-to-source voltage being less than an SR-on threshold voltage, wherein the deglitch control circuit is further configured to control the adaptive delay to equal a second value responsive to a detection that the SR switch transistor has been switched on, wherein the second value is greater than the first value.

12. The SR controller of claim 11 , wherein the deglitch control circuit is further configured to integrate a function of the drain-to-source voltage to determine whether the power switch has been switched on.

13. The SR controller of claim 12 , wherein the function equals the drain-to-source voltage minus a product of a coefficient k with an output voltage for the flyback converter.

14. The SR controller of claim 13 , wherein k equals two.

15. A method of synchronous rectification in a flyback converter, comprising:
disabling a deglitch filter responsive to a determination that a power switch connected to a primary winding in the flyback converter has been switched on;
while the deglitch filter is disabled, switching on a synchronous rectifier (SR) switch transistor connected to a secondary winding for the flyback converter responsive to a drain-to-source voltage for the SR switch transistor falling below an SR-on threshold voltage;
subsequent to the SR switch transistor being switched on, enabling the deglitch filter to produce a filtered version of the drain-to-source voltage that filters out glitches on the drain-to-source voltage; and
comparing the filtered version of the drain-to-source voltage to the SR-on threshold voltage to determine whether to switch on the SR switch transistor.

16. The method of claim 15 , wherein enabling the deglitch filter is responsive to an expiration of a delay following the switching on of the SR switch transistor.

17. The method of claim 15 , further comprising:
integrating a function of the drain-to-source voltage to produce an integrated signal;
determining whether the integrated signal exceeds a primary-on threshold voltage to determine whether the power switch transistor has been switched on.

18. The method of claim 17 , wherein integrating the function comprises integrating a difference between the drain-to-source voltage and a product of a coefficient k with an output voltage for the flyback converter.

19. The method of claim 18 , wherein the coefficient equals two.

20. The method of claim 15 , further comprising:
switching off the SR switch transistor responsive to a determination that the drain-to-source voltage exceeds an SR-off threshold voltage.

21. A synchronous rectifier (SR) controller, comprising:
a first comparator configured to assert a first comparator output signal for responsive to a drain-to-source for an SR switch transistor being less than an SR-on threshold voltage;
a deglitch filter for filtering the first comparator output signal to produce a filtered comparator output signal;
a multiplexer for selecting between the first comparator output signal and the filtered comparator output signal to produce a multiplexer output signal;
a deglitch control circuit configured to control the multiplexer to select for the first comparator output signal responsive to a detection that a power switch connected to a primary winding for a flyback converter has been switched on; and
a switch driver configured to switch on the SR switch transistor responsive to an assertion of the multiplexer output signal.

22. The SR controller of claim 21 , wherein the deglitch control circuit is further configured to integrate a function of the drain-to-source voltage to determine whether the power switch has been switched on.

23. The SR controller of claim 22 , wherein the function equals the drain-to-source voltage minus a product of a coefficient k with an output voltage for the flyback converter.

24. The SR controller of claim 23 , wherein k equals two.

25. A method of synchronous rectification in a flyback converter, comprising:
disabling a deglitch filter responsive to a determination that a power switch connected to a primary winding in the flyback converter has been switched on;
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Assignees

• Dialog Semiconductor Inc

Inventors

• Kong Pengju
• Li Tao
• Bui Hien
• Liang Wenbo
• Zhang Hanguang

Classifications

• H02M3/33592 Primary

  having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer · CPC title

• H03K5/1252

  Suppression or limitation of noise or interference (specially adapted for transmission systems H04B15/00, H04L25/08) · CPC title

• H02M1/08

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title