Methods and apparatus providing thermal isolation of photonic devices

US11217737B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11217737-B2
Application numberUS-202016945309-A
CountryUS
Kind codeB2
Filing dateJul 31, 2020
Priority dateJun 15, 2012
Publication dateJan 4, 2022
Grant dateJan 4, 2022

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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Described embodiments include photonic integrated circuits and systems with photonic devices, including thermal isolation regions for the photonic devices. Methods of fabricating such circuits and systems are also described.

First claim

Opening claim text (preview).

We claim: 1. A method of operating an integrated structure, the method comprising: heating, with a heating device formed in a device formation region of the integrated structure, a temperature-sensitive photonic device formed in the device formation region; and thermally isolating, with a thermal isolation structure located in a trench formed in an upper surface of a substrate of the integrated structure, the substrate, wherein the heating device is located directly over the thermal isolation structure, and wherein the temperature-sensitive photonic device is laterally separated from the thermal isolation structure such that the temperature-sensitive photonic device is not formed directly over the thermal isolation structure. 2. The method of claim 1 , further comprising operating a waveguide formed in the device formation region, wherein the waveguide is separated from the trench by a portion of the substrate. 3. The method of claim 1 , wherein the thermal isolation structure comprises a physical gap between the heating device and substrate. 4. The method of claim 1 , wherein the thermal isolation structure is a first thermal isolation structure, and further comprising thermally isolating, with a second thermal isolation structure, the temperature-sensitive photonic device. 5. The method of claim 4 , wherein the second thermal isolation structure is located in the trench. 6. The method of claim 4 , wherein the first thermal isolation structure and the second thermal structure comprise separate materials. 7. The method of claim 4 , wherein the trench is a first trench, and wherein the second thermal isolation structure is located in a second trench. 8. The method of claim 1 , wherein the first thermal isolation structure comprises a low thermal conductivity material within the first trench. 9. The method of claim 8 , wherein the low thermal conductivity material has a thermal conductivity that is less than approximately 0.006 W/cm° C. 10. The method of claim 8 , wherein the low thermal conductivity material comprises an oxide doped with a material having a lower thermal conductivity than the oxide. 11. The method of claim 8 , wherein the low thermal conductivity material comprises silicon dioxide that has been doped with a dopant having a lower dielectric constant than the silicon dioxide. 12. The method of claim 11 , wherein the dopant comprises fluorine or carbon. 13. The method of claim 8 , wherein the low thermal conductivity material comprises porous silicon dioxide. 14. The method of claim 8 , wherein the low thermal conductivity material comprises spin-on silicon dioxide. 15. The method of claim 1 , wherein the temperature-sensitive photonic device comprises a carrier wave modulator. 16. The method of claim 1 , wherein the temperature-sensitive photonic device comprises a laser. 17. The method of claim 1 , wherein the trench and the thermal isolation structure form a shallow trench isolation region.

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Classifications

  • of means for heat extraction or cooling · CPC title

  • H10H20/858Primary

    Means for heat extraction or cooling · CPC title

  • forming wavelength selective elements, e.g. multiplexer, demultiplexer · CPC title

  • of the integrated circuit kind (electric integrated circuits H10B, H10D84/00 - H10D89/00, H10F19/00, H10F39/00, H10H29/00, H10K19/00, H10K39/00, H10K59/00, H10N19/00, H10N39/00, H10N59/00, H10N69/00, H10N79/00, H10N89/00) · CPC title

  • of directional coupler type · CPC title

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What does patent US11217737B2 cover?
Described embodiments include photonic integrated circuits and systems with photonic devices, including thermal isolation regions for the photonic devices. Methods of fabricating such circuits and systems are also described.
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification H10H20/858. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 04 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).