Device and method for calibrating reference voltage

Patent metadata

Field	Value
Publication number	US-11217299-B2
Application number	US-202016997445-A
Country	US
Kind code	B2
Filing date	Aug 19, 2020
Priority date	Nov 15, 2019
Publication date	Jan 4, 2022
Grant date	Jan 4, 2022

Abstract

Disclosed are a device and a method for calibrating a reference voltage. The reference voltage calibrating device includes a data signal communication unit that transmits/receives a data signal, a data strobe signal receiving unit that receives a first data strobe signal and a second data strobe signal, a voltage level of the second data strobe signal being opposite to a voltage level of the first data strobe signal, and a reference voltage generating unit that sets a reference voltage for determining a data value of the data signal, based on the first data strobe signal and the second data strobe signal, and the reference voltage generating unit adjusts the reference voltage based on the first data strobe signal and the second data strobe signal.

First claim

What is claimed is:

1. A reference voltage calibrating device comprising:
a data signal communication unit configured to transmit/receive a data signal;
a data strobe signal receiving unit configured to receive a first data strobe signal and a second data strobe signal, a voltage level of the second data strobe signal being opposite to a voltage level of the first data strobe signal; and
a reference voltage generating unit configured to set a reference voltage for determining a data value of the data signal, based on the first data strobe signal and the second data strobe signal,
wherein the reference voltage generating unit adjusts the reference voltage based on the first data strobe signal and the second data strobe signal,
wherein the reference voltage generating unit includes:
a first low pass filter configured to receive and filter the first data strobe signal to output a first voltage;
a second low pass filter configured to receive and filter the second data strobe signal to output a second data voltage;
a first comparator configured to receive the first data voltage and the reference voltage and to output a first signal based on the first data voltage and the reference voltage;
a second comparator configured to receive the second data voltage and the reference voltage and to output a second signal based on the second data voltage and the reference voltage;
an up/down counter configured to perform a control operation for calibrating the reference voltage based the first signal and the second signal; and
a resistive digital-to-analog converter (RDAC) circuit configured to calibrate and output the reference voltage based on the control operation of the up/down counter.

2. The reference voltage calibrating device of claim 1 , wherein the data signal communication unit includes:
a data signal receiving unit configured to receive the data signal; and
a data signal transmitting unit configured to transmit the data signal.

3. The reference voltage calibrating device of claim 2 , wherein the data signal receiving unit includes:
a first on-die termination circuit configured to adjust a resistance of a data signal pin in receiving the data signal;
continuous time linear equalization configured to receive the data signal and the reference voltage and to compensate for a partial frequency component of the data signal;
an amplifier configured to receive and amplify the data signal in which the partial frequency component is removed; and
a comparator configured to determine a data value of the data signal.

4. The reference voltage calibrating device of claim 2 , wherein the data signal transmitting unit includes a driver circuit configured to transfer the data signal.

5. The reference voltage calibrating device of claim 1 , wherein the data strobe signal receiving unit includes:
a first on-die termination circuit configured to adjust a resistance of a first data strobe signal pin receiving the first data strobe signal;
a second on-die termination circuit configured to adjust a resistance of a second data strobe signal pin receiving the second data strobe signal;
continuous time linear equalization configured to receive the first data strobe signal and the second data strobe signal and to compensate for a partial frequency component; and
an amplifier configured to amplify a signal output from the continuous time linear equalization.

6. The reference voltage calibrating device of claim 1 , wherein the RDAC circuit includes:
first to n-th resistors serially connected and disposed in the form of an array; and
first to (n−1)-th switches disposed on conducting wires diverging from connections between the first to n-th resistors.

7. The reference voltage calibrating device of claim 6 , wherein whether to turn on or off the first to (n−1)-th switches is determined by the control operation performed by the up/down counter.

8. The reference voltage calibrating device of claim 7 , wherein one of the first to (n−1)-th switches is turned on, and remaining switches thereof are turned off.

9. A reference voltage calibrating method comprising:
receiving a first data strobe signal and a second data strobe signal being a differential signal of the first data strobe signal;
filtering the first data strobe signal and the second data strobe signal;
outputting a first data voltage and a second data voltage based on the filtered first data strobe signal and the filtered second data strobe signal;
outputting a first signal based on the first data voltage and a reference voltage;
outputting a second signal based on the second data voltage and the reference voltage;
calibrating the reference voltage based on the first signal and the second signal;
receiving a data signal; and
determining the data signal based on the reference voltage.

10. The reference voltage calibrating method of claim 9 , wherein the outputting of the first signal and the second signal is performed in response to receiving a preamble of the first data strobe signal and the second data strobe signal.

11. The reference voltage calibrating method of claim 9 , further comprising:
comparing the first signal and the reference voltage to output a first output code; and
comparing the second signal and the reference voltage to output a second output code.

12. The reference voltage calibrating method of claim 11 , wherein, when the first output code and the second output code are identical at least once, an up/down counter controls control logic to calibrate the reference voltage, and
wherein, when the first output code and the second output code are different, the up/down counter maintains the reference voltage.

13. The reference voltage calibrating method of claim 9 , wherein the outputting of the first signal and the second signal is terminated in response to that a burst length is terminated.

Assignees

• Electronics & Telecommunications Res Inst

Inventors

• Jeon Young-Deuk
• Kim Seong Min
• Kim Jin Kyu
• Lee Joo Hyun
• Cho Min-Hyung
• Han Jin Ho

Classifications

• G11C11/4076 Primary

  Timing circuits (for regeneration management G11C11/406) · CPC title

• G11C11/4093

  Input/output [I/O] data interface arrangements, e.g. data buffers · CPC title

• G11C7/1057

  Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load · CPC title

• G11C7/1066

  Output synchronization · CPC title

• G11C11/4099

  Dummy cell treatment; Reference voltage generators · CPC title