Wafer level packages of high voltage units for implantable medical devices

Patent metadata

Field	Value
Publication number	US-11213690-B2
Application number	US-201213524253-A
Country	US
Kind code	B2
Filing date	Jun 15, 2012
Priority date	Jun 15, 2012
Publication date	Jan 4, 2022
Grant date	Jan 4, 2022

Abstract

A multi-chip modular wafer level package of a high voltage unit for an implantable cardiac defibrillator includes one or more high voltage (HV) component chips encapsulated with other components thereof in a polymer mold compound of a single reconstituted wafer, wherein all interconnect segments are preferably located on a single side of the wafer. To electrically couple a contact surface of each HV chip, located on a side of the chip opposite the interconnect side of the wafer, the reconstituted wafer may include conductive through polymer vias; alternately, either wire bonds or layers of conductive polymer are formed to couple the aforementioned contact surface to the corresponding interconnect, prior to encapsulation of the HV chips. In some cases one or more of the components encapsulated in the reconstituted wafer of the package are reconstituted chips.

First claim

The invention claimed is:

1. A multi-chip modular wafer level package of a high voltage unit for an implantable cardiac defibrillator, the package comprising:
a high voltage (HV) component chip including a first conductive contact surface located on a first side thereof, and a second conductive contact surface located on a second side thereof, the second side of the HV chip being opposite the first side of the HV chip;
an interconnect coupled to the second conductive contact surface of the HV chip, wherein the interconnect comprises:
an interconnect segment; and
a conductive coupling extending between the second conductive contact surface of the HV chip to the interconnect segment to electrically couple the second conductive contact surface of the HV chip to the interconnect segment; and

a reconstituted wafer formed by a polymer mold compound in which the HV chip is encapsulated together with other chips of the multi-chip modular wafer level package, wherein the polymer mold compound forming the reconstituted wafer fully encapsulates the conductive coupling of the interconnect and encapsulates the HV chip and the other chips such that the first side of each chip is coplanar with a first side of the wafer, and wherein the polymer mold compound forming the reconstituted wafer encapsulates the HV chip and the other chips such that the second side of the HV chip coupled to the interconnect is enclosed within the polymer mold compound,
wherein at least a portion of the interconnect coupled to the second conductive contact surface located on the second side of the HV chip is encapsulated within the polymer mold compound used to form the reconstituted wafer and the interconnect segment provides an interconnect segment contact surface at the first side of the wafer.

2. The package of claim 1 , wherein the interconnect comprises a layer of conductive polymer extending from a first end, coupled to the second conductive contact surface of the HV chip, to a second end defining the conductive coupling and forming the interconnect segment at the second end, the layer of conductive polymer being encapsulated within the mold compound such that the second end thereof forms the interconnect segment contact surface provided at the first side of the wafer.

3. The package of claim 2 , further comprising a redistribution layer extending over the first side of the reconstituted wafer, the redistribution layer comprising a plurality of routing traces, a first of the routing traces being coupled to the first conductive contact surface of the HV component chip and a second of the routing traces being coupled to the interconnect segment contact surface provided at the first side of the wafer.

4. The package of claim 1 , further comprising a redistribution layer extending over the first side of the reconstituted wafer, the redistribution layer comprising a plurality of routing traces, a first of the routing traces being coupled to the first conductive contact surface of the HV component chip and a second of the routing traces being coupled to the interconnect segment contact surface provided at the first side of the wafer.

5. The package of claim 1 , further comprising:
a layer of conductive polymer of the interconnect overlaying and coupled to the second conductive contact surface of the HV component chip; and
a redistribution layer extending over a second side of the reconstituted wafer, the second side of the reconstituted wafer being opposite the first side thereof, the redistribution layer comprising a routing trace of the interconnect coupled to the layer of conductive polymer; and
wherein the reconstituted wafer includes a conductive through polymer via (TPV) of the interconnect extending from a first end at the first side of the wafer to a second end at the second side of the wafer, the second end of the TPV being coupled to the conductive routing trace of the redistribution layer, and the HV interconnect segment comprising the first end of the TPV.

6. The package of claim 5 , further comprising another redistribution layer extending over the first side of the reconstituted wafer, the other redistribution layer comprising a plurality of routing traces, a first of the routing traces being coupled to the first conductive contact surface of the HV component chip and a second of the routing traces being coupled to the interconnect segment contact surface provided at the first side of the wafer.

7. The package of claim 1 , wherein the interconnect comprises a via block.

8. The package of claim 1 , wherein the interconnect further comprises a conductive post extending from the interconnect segment to a second side of the reconstituted wafer, the second side of the reconstituted wafer being opposite the first side thereof.

9. The package of claim 8 , further comprising:
a layer of conductive polymer of the interconnect overlaying and coupled to the second conductive contact surface of the HV component chip; and
a redistribution layer extending over a second side of the reconstituted wafer, the second side of the reconstituted wafer being opposite the first side thereof, the redistribution layer comprising a routing trace of the interconnect coupling the layer of conductive polymer to the conductive post of the interconnect.

10. The package of claim 1 , wherein:
the HV chip is incorporated in a reconstituted chip, the reconstituted chip further comprising:
a first side corresponding to and coplanar with the first side of the HV chip;
a second side corresponding to the second side of the HV chip;
a conductive through polymer via (TPV) of the interconnect extending from a first end, at the first side of the reconstituted chip, to a second end, at the second side of the reconstituted chip; and

a routing trace of the interconnect extending over the second side of the reconstituted chip and coupling the second conductive contact surface of the HV chip to the second end of the TPV; and

the interconnect segment comprises the first end of the TPV of the reconstituted chip.

11. The package of claim 10 , further comprising:
another HV component chip encapsulated in the reconstituted wafer and having a thickness greater than that of the reconstituted chip, the other HV component chip including a first conductive contact surface located on a first side thereof, and a second conductive contact surface located on a second side thereof, the second side of the other HV component chip being opposite the first side of the other HV component chip, the first conductive contact surface of the other HV component chip being coplanar with the first side of the reconstituted wafer, and the second conductive contact surface of the other HV component chip being coplanar with a second side of the reconstituted wafer, the second side of the reconstituted wafer being opposite the first side; and
a redistribution layer extending over the second side of the reconstituted wafer, the redistribution layer comprising a routing trace coupled to the second conductive contact surface of the other HV component chip; and
wherein the reconstituted wafer includes a conductive through polymer via (TPV) extending alongside the other HV component chip, from a first end at the first side of the wafer to a second end at the second side of the wafer, the first end of the TPV forming an interconnect segment for the other HV component chip, and the second end of the TPV being coupled to the routing trace of the redistribution layer.

12. The package of claim 10 , further comprising:
a stacked pair of reconstituted chips encapsulated in the reconstituted wafer, each reconstituted chip of the stacked pair comprising a first side, a first co

Assignees

• Boone Mark R
• Askarinya Mohsen
• Crutchfield Randolph E
• Herrmann Erik J
• Ricotta Mark S
• Wang Lejun
• Medtronic Inc

Inventors

• Boone Mark R
• Askarinya Mohsen
• Crutchfield Randolph E
• Herrmann Erik J
• Ricotta Mark S
• Wang Lejun

Classifications

• H10W72/5522

  comprising gold [Au] · CPC title

• H10W72/5525

  comprising copper [Cu] · CPC title

• H10W90/811

  Multiple chips on leadframes · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W70/424

  Cross-sectional shapes (H10W70/481 takes precedence) · CPC title