Power module with capacitor configured for improved thermal management

US11212947B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11212947-B2
Application numberUS-201716090747-A
CountryUS
Kind codeB2
Filing dateApr 5, 2017
Priority dateApr 6, 2016
Publication dateDec 28, 2021
Grant dateDec 28, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A module having a power semiconductor device and a ceramic capacitor which is configured for cooling the power semiconductor device.

First claim

Opening claim text (preview).

The invention claimed is: 1. Module, comprising a power semiconductor device, a ceramic capacitor which is configured for cooling the power semiconductor device, and at least one further capacitor also configured to cool the power semiconductor device, wherein the ceramic capacitor and the power semiconductor device are connected together by a layer at least comprising silver as a constituent, and wherein the coefficients of thermal expansion of the ceramic capacitor, of the power semiconductor device and of the silver-comprising layer differ from each other by no more than 10 −5 K −1 , and wherein the module further comprises a control unit configured to control a function of the power semiconductor device, wherein the power semiconductor device includes an upper side on which the ceramic capacitor is arranged, and wherein the power semiconductor device includes a lower side that is opposite the upper side, the control unit being arranged directly on the lower side. 2. Module according to claim 1 , wherein the ceramic capacitor comprises a lead-lanthanum-zirconate-titanate ceramic. 3. Module according to claim 1 , wherein the layer, via which the ceramic capacitor and the power semiconductor device are connected together, includes at least 99 wt. % silver. 4. Module according to claim 1 , wherein the layer, via which the ceramic capacitor and the power semiconductor device are connected together, has been produced in a sintering process. 5. Module according to claim 1 , wherein the ceramic capacitor forms a support to which the power semiconductor device is secured. 6. Module according to claim 1 , wherein the ceramic capacitor comprises a ceramic material which has a dielectric constant of more than 2000 in an electrical field with a field strength between 5 kV/mm and 10 kV/mm and which is compatible with temperatures of at least 150° C. 7. Module according to claim 1 , wherein the ceramic capacitor comprises a ceramic material having a formulation Pb (1-1,5a+e) A a B b (Zr 1-x Ti x ) 1-c C e Si c O 3 +y .PbO wherein A is selected from the group consisting of La, Nd, Y, Eu, Gd, Tb, Dy, Ho, Er and Yb; C is selected from the group consisting of Ni and Cu; and 0<a<0.12 0.05≤x≤0.3 0≤c<0.12 0.001<e<0.12 0≤y<1. 8. Module according to claim 7 , wherein the ceramic capacitor is a ceramic multi-layer device and comprises inner electrodes. 9. Module according to claim 8 , wherein the inner electrodes have a thermal conductivity of more than 100 W/mK. 10. Module according to claim 8 , wherein the inner electrodes comprise copper. 11. Module according to claim 7 , comprising at least one further power semiconductor component, wherein the ceramic capacitor is configured for cooling the at least one further power semiconductor component. 12. Module according to claim 7 , wherein the module further comprises a control unit which is configured for controlling a function of the power semiconductor device. 13. Module according to claim 12 , wherein the power semiconductor device comprises an upper side on which the ceramic capacitor is arranged, and wherein the power semiconductor device comprises a lower side which is opposite the upper side and on which the control unit is arranged. 14. Module according to claim 7 , wherein the power semiconductor device comprises a switch. 15. Module according to claim 7 , wherein the ceramic capacitor is interconnected with the power semiconductor device such that the ceramic capacitor acts as an intermediate circuit capacitor or as a damping capacitor. 16. Module, comprising a power semiconductor device, a ceramic capacitor which is configured for cooling the power semiconductor device, and at least one further capacitor configured to cool the power semiconductor device, wherein the ceramic capacitor comprises a lead-lanthanum-zirconate-titanate ceramic, and wherein the ceramic capacitor and the power semiconductor device are connected together by a layer at least comprising silver as a constituent, wherein the coefficients of thermal expansion of the ceramic capacitor, of the power semiconductor and of the silver-comprising layer differ from each other by no more than 10 −5 K −1 , wherein the module further comprises a control unit configured to control a function of the power semiconductor device, wherein the power semiconductor device includes an upper side on which the ceramic capacitor is arranged, and wherein the power semiconductor device includes a lower side that is opposite the upper side, the control unit being arranged directly on the lower side. 17. Module according to claim 16 , wherein the ceramic capacitor and the power semiconductor device are connected together by a layer at least comprising silver as a constituent. 18. Module according to claim 17 , wherein the layer, via which the ceramic capacitor and the power semiconductor device are connected together, includes at least 99 wt. % silver. 19. Module according to claim 16 , wherein the ceramic capacitor forms a support to which the power semiconductor device is secured. 20. Module according to claim 16 , wherein the ceramic capacitor comprises a ceramic material having a formulation Pb (1-1,5a+e) A a B b (Zr 1-x Ti x ) 1-c C e Si c O 3 +y .PbO wherein A is selected from the group consisting of La, Nd, Y, Eu, Gd, Tb, Dy, Ho, Er and Yb; C is selected from the group consisting of Ni and Cu; and 0<a<0.12 0.05≤x≤0.3 0≤c<0.12 0.001<e<0.12 0≤y<1. 21. Module according to claim 16 , wherein the ceramic capacitor is a ceramic multi-layer device and comprises inner electrodes. 22. Module according to claim 16 , wherein the ceramic capacitor comprises inner electrodes, and wherein the inner electrodes have a thermal conductivity of more than 100 W/mK. 23. Module according to claim 16 , wherein the ceramic capacitor comprises inner electrodes, and wherein the inner electrodes comprise copper. 24. Module according to claim 17 , wherein the layer, via which the ceramic capacitor and the power semiconductor device are connected together, has been produced in a sintering process. 25. Module according to claim 16 , wherein the ceramic capacitor comprises a ceramic material which has a dielectric constant of more than 2000 in an electrical field with a field strength between 5 kV/mm and 10 kV/mm and which is compatible with temperatures of at least 150° C. 26. Module according to claim 16 , comprising at least one further power semiconductor component, wherein the ceramic capacitor is configured for cooling the at least one further power semiconductor component. 27. Module according to claim 16 , wherein the module further comprises a control unit which is configured for controlling a function of the power semiconductor device. 28. Module according to claim 16 , wherein the power semiconductor device comprises an upper side on which the ceramic capacitor is arranged, and wherein the power semiconductor device comprises a lower side which is opposite the upper side and on which the control unit is arranged. 29. Module according to claim 16 , wherein the power semiconductor device comprises a switch. 30. Module according to claim 16 , wherein the ceramic capacitor is interconnected with the power semiconductor

Assignees

Inventors

Classifications

  • between a chip and a stacked discrete passive device · CPC title

  • Connecting techniques · CPC title

  • comprising metals or metalloids, e.g. solders · CPC title

  • Package configurations · CPC title

  • having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title

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Frequently asked questions

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What does patent US11212947B2 cover?
A module having a power semiconductor device and a ceramic capacitor which is configured for cooling the power semiconductor device.
Who is the assignee on this patent?
Epcos Ag
What technology area does this patent fall under?
Primary CPC classification H01G4/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 28 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).