Repeater defect detection

Patent metadata

Field	Value
Publication number	US-11204332-B2
Application number	US-202016845681-A
Country	US
Kind code	B2
Filing date	Apr 10, 2020
Priority date	Jun 5, 2017
Publication date	Dec 21, 2021
Grant date	Dec 21, 2021

Abstract

Defects from a hot scan can be saved, such as on persistent storage, random access memory, or a split database. The persistent storage can be patch-based virtual inspector virtual analyzer (VIVA) or local storage. Repeater defect detection jobs can determined and the wafer can be inspected based on the repeater defect detection jobs. Repeater defects can be analyzed and corresponding defect records to the repeater defects can be read from the persistent storage. These results may be returned to the high level defect detection controller.

First claim

What is claimed is:

1. A method to detect repeater defects comprising:
performing a hot scan inspection of an entire surface of a wafer;
storing a position of defects from the hot scan inspection to a storage medium, wherein the storage medium is persistent storage, random access memory, or a split database;
determining, using a processor, coordinates for repeater defect detection;
inspecting the wafer based on the coordinates for repeater defect detection, wherein:
both a first die and a second die are imaged using a reticle at a first position on a first wafer;
both a first die and a second die are imaged using the reticle at a second position on the first wafer;
both a first die and a second die are imaged using the reticle at a first position on a second wafer; and
both a first die and a second die are imaged using the reticle at a second position on the second wafer;

calculating a first wafer difference image in a first wafer step by:
calculating, using the processor, a difference image of the first die and the second die at a second position on the first wafer;
calculating, using the processor, a difference image of the first die at the second position on the first wafer and the second die at a first position on the first wafer; and
calculating, using the processor, the first wafer difference image of the two difference images of the first wafer step;

analyzing repeater defects using the processor; and
retrieving corresponding defect records to the repeater defects from the storage medium.

2. The method of claim 1 , wherein a patch-based virtual inspector virtual analyzer is used for the storage medium.

3. The method of claim 1 , wherein local storage is used for the storage medium.

4. The method of claim 1 , further comprising freeing space in the storage medium after the retrieving.

5. The method of claim 1 , further comprising saving coordinates of the defects in shared memory prior to the determining.

6. The method of claim 1 , further comprising:
calculating a second wafer difference image in a second wafer step by:
calculating, using the processor, a difference image of the first die and the second die at a second position on the second wafer;
calculating, using the processor, a difference image of the first die at the second position on the first wafer and the second die at a first position on the second wafer; and
calculating, using the processor, the second wafer difference image of the two difference images of the second wafer step;

finding, using the processor, systematic defects in the first wafer difference image using coordinate-based defect source analysis;
subtracting, using the processor, the systematic defects in the first wafer difference image from the second wafer difference image; and
determining, using the processor, existence of a defect of interest in the second wafer difference image after the subtracting.

7. The method of claim 1 , further comprising:
calculating a second wafer difference image in a second wafer step by:
calculating, using the processor, a difference image of the first die and the second die at a second position on the second wafer;
calculating, using the processor, a difference image of the first die at the second position on the first wafer and the second die at a first position on the second wafer; and
calculating, using the processor, the second wafer difference image of the two difference images of the second wafer step;

subtracting, using the processor, the second wafer difference image from the first wafer difference image; and
determining, using the processor, existence of a defect of interest in the second wafer difference image after the subtracting.

8. The method of claim 1 , further comprising:
determining, using the processor, existence of a defect of interest in the first wafer difference image;
retrieving images from the storage medium, wherein the images are at a same location on the first wafer as the first die and the second die on the second wafer;
evaluating, using the processor, presence of the defect of interest in the images from the storage medium; and
filtering, using the processor, nuisance from the first wafer difference image.

9. A method for filtering nuisance comprising:
imaging, on a first wafer and a second wafer, both a first die and a second die using a reticle at a first position and both a first die and a second die using the reticle at a second position;
calculating a difference image of the second wafer in a second wafer step by:
calculating, using a processor, a difference image of the first die and the second die at the second position on the second wafer;
calculating, using the processor, a difference image of the first die at the second position on the first wafer and the second die at the first position on the second wafer; and
calculating, using the processor, the difference image of the second wafer using the two difference images of the second wafer step; and

determining, using the processor, existence of a defect of interest in the wafer difference image of the second wafer.

10. The method of claim 9 , further comprising:
retrieving images from the storage medium, wherein the images are at a same location on the first wafer as the first die and the second die on the second wafer;
evaluating, using the processor, presence of the defect of interest in the images from the storage medium; and
filtering, using the processor, nuisance from the second wafer difference image.

11. The method of claim 9 , further comprising:
calculating a difference image of the first wafer in a first wafer step by:
calculating, using the processor, a difference image of the first die and the second die at the second position on the first wafer;
calculating, using the processor, a difference image of the first die at the second position on the first wafer and the second die at the first position on the first wafer; and
calculating, using the processor, the wafer difference image of the first wafer using the two difference images of the first wafer step;

finding, using the processor, systematic defects in the difference image of the first wafer using coordinate-based defect source analysis; and
subtracting, using the processor, the systematic defects in the difference image of the first wafer from the difference image of the second wafer, wherein the determining existence of the defect of interest in the difference image of the second wafer is after the subtracting.

12. The method of claim 9 , further comprising:
calculating a difference image of the first wafer in a first wafer step by:
calculating, using the processor, a difference image of the first die and the second die at a second position on the first wafer;
calculating, using the processor, a difference image of the first die at the second position on the first wafer and the second die at a first position on the first wafer; and
calculating, using the processor, the difference image of the first wafer using the two difference images of the first wafer step; and

subtracting, using the processor, the difference image of the second wafer from the difference image of the first wafer, wherein the determining existence of the defect of interest in the difference image of the second wafer is after the subtracting.

13. A system comprising:
a controller in electronic communication with a wafer inspection tool, wherein the controller includes a processor and an electronic data storage unit in electronic communication with the processor, wherein the electronic data storage unit includes persistent storage, random access memory, or a split database, and wherei

Assignees

• Kla Tencor Corp

Inventors

• Shifrin Eugene
• Brauer Bjorn
• Sen Sumit
• Mathew Ashok
• Chandrasekaran Sreeram
• Gao Lisheng

Classifications

• H10P74/203 Primary

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P74/23 Primary

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title

• H10P74/20

  characterised by the properties tested or measured, e.g. structural or electrical properties · CPC title

• G06T2207/30148

  Semiconductor; IC; Wafer · CPC title

• G06T7/001

  using an image reference approach · CPC title