Reprogrammable non-volatile ferroelectric latch for use with a memory controller

US11200937B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11200937-B2
Application numberUS-201916675021-A
CountryUS
Kind codeB2
Filing dateNov 5, 2019
Priority dateOct 5, 2016
Publication dateDec 14, 2021
Grant dateDec 14, 2021

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Methods, systems, and apparatuses related to a reprogrammable non-volatile latch are described. A latch may include ferroelectric cells, ferroelectric capacitors, a sense component, and other circuitry and components related to ferroelectric memory technology. The ferroelectric latch may be independent from (or exclusive of) a main ferroelectric memory array. The ferroelectric latch may be positioned anywhere in the memory device. In some instances, a ferroelectric latch may be positioned and configured to be dedicated to single piece of circuitry in the memory device.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus, comprising; a controller; and a latch configured to store data and in electronic communication with the controller and comprising: a first capacitor coupled between a first access line and a first plate; a second capacitor coupled between a second access line and a second plate; a first switching component configured to selectively couple the first access line with a voltage source; a second switching component configured to selectively couple the first access line with a ground node; a third switching component configured to selectively couple the first plate with the voltage source; a fourth switching component configured to selectively couple the first plate with the ground node; a fifth switching component configured to selectively couple the first access line with a first node of a sense component; and a sixth switching component configured to selectively couple the second access line with a second node of the sense component, wherein the sense component is operable to output a stored value of the latch based at least in part on a signal at the first node of the sense component and a signal at the second node of the sense component. 2. The apparatus of claim 1 , wherein the latch further comprises: a third capacitor coupled between the voltage source and the first access line; and a fourth capacitor coupled between the voltage source and the second access line. 3. A method, comprising: receiving a logic value at a latch comprising a first capacitor and a second capacitor, the first capacitor coupled between a first access line and a first plate, and the second capacitor coupled between a second access line and a second plate; storing a value at the first capacitor based at least in part on receiving the logic value, wherein storing the value comprises: activating a first switching component to couple the first access line with a voltage source; and activating a second switching component to couple the first plate with a ground node; and storing a complement of the value at the second capacitor based at least in part on receiving the logic value, wherein storing the complement of the value comprises: activating a third switching component to couple the second access line with the ground node; and activating a fourth switching component to couple the second plate with the voltage source. 4. The method of claim 3 , further comprising: activating a ninth switching component to couple the first access line with a first node of a sense component; activating a tenth switching component to couple the second access line with a second node of the sense component; sensing, after coupling the first access line with the first node of the sense component and coupling the second access line with the second node of the sense component, a logic value stored by the latch based at least in part on a signal at the first node and a signal at the second node; and outputting the sensed logic value. 5. The method of claim 4 , wherein sensing the logic value stored by the latch further comprises: deactivating the first switching component to isolate the first access line from the voltage source; deactivating the second switching component to isolate the first plate from the ground node; deactivating the third switching component to isolate the second access line from the ground node; activating the fourth switching component to couple the second plate with the voltage source; deactivating a fifth switching component to isolate the first access line from the ground node; activating a sixth switching component to couple the first plate with the voltage source; deactivating a seventh switching component to isolate the second access line from the voltage source; and deactivating an eight switching component to isolate the second plate from the ground node. 6. The method of claim 4 , further comprising: isolating the first access line from the sense component via the ninth switching component during at least a portion of a duration for storing the value; and isolating the second access line from the sense component via the tenth switching component during at least a portion of a duration for storing the complement of the value. 7. An apparatus, comprising: a latch configured to store data and comprising: a first capacitor coupled between a first access line and a first plate; and a second capacitor coupled between a second access line and a second plate; a sense component couplable with the first capacitor and the second capacitor; and a controller operable to cause the apparatus to: receive a logic value; store a value at the first capacitor based at least in part on receiving the logic value, wherein, to store the value at the first capacitor, the controller is operable to cause the apparatus to: activate a first switching component to selectively couple the first access line with a voltage source; and activate a second switching component to selectively couple the first plate with a ground node; and store a complement of the value at the second capacitor based at least in part on receiving the logic value, wherein, to store the complement of the value at the second capacitor, the controller is operable to cause the apparatus to: activate a third switching component to selectively couple the second access line with the ground node; and activate a fourth switching component to selectively couple the second plate with the voltage source. 8. The apparatus of claim 7 , wherein the controller is further operable to cause the apparatus to: activate a ninth switching component to couple the first access line with a first node of the sense component; activate a tenth switching component to couple the second access line with a second node of the sense component; sense, after coupling the first access line with the first node of the sense component and coupling the second access line with the second node of the sense component, a logic value stored by the latch based at least in part on a signal at the first node and a signal at the second node; and output the sensed logic value stored by the latch. 9. The apparatus of claim 7 , further comprising: an array of memory cells, wherein the latch is configured to sense the value from the first capacitor and sense the complement of the value from the second capacitor without communicating with the array of memory cells. 10. The apparatus of claim 8 , wherein the controller is further operable to cause the apparatus to: isolate the first capacitor from the sense component via the ninth switching component during at least a portion of a duration for storing the value; and isolate the second capacitor from the sense component via the tenth switching component during at least a portion of a duration for storing the complement of the value. 11. The apparatus of claim 1 , wherein the third switching component and the fourth switching component are coupled with a same signal operable for selectively isolating the first plate from the voltage source when the first plate is selectively coupled with the ground node. 12. The apparatus of claim 1 , further comprising: a seventh switching component configured to selectively couple the second access line with the voltage source; an eighth switching component configured to selectively couple the second access line with the ground node; a ninth switching component configured to selectively couple the second plate with the voltage source; and a tenth switching component configured to selectively couple the second plate with the ground node. 13. The apparatus of claim 12 , wher

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Classifications

  • Reading or sensing circuits or methods · CPC title

  • using ferroelectric capacitors · CPC title

  • Writing or programming circuits or methods · CPC title

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What does patent US11200937B2 cover?
Methods, systems, and apparatuses related to a reprogrammable non-volatile latch are described. A latch may include ferroelectric cells, ferroelectric capacitors, a sense component, and other circuitry and components related to ferroelectric memory technology. The ferroelectric latch may be independent from (or exclusive of) a main ferroelectric memory array. The ferroelectric latch may be posi…
Who is the assignee on this patent?
Micron Technology Inc
What technology area does this patent fall under?
Primary CPC classification G11C11/2275. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 14 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).