Measurement circuitry for evaluating a resistance of a resistive gas sensor

Patent metadata

Field	Value
Publication number	US-11199516-B2
Application number	US-201716337498-A
Country	US
Kind code	B2
Filing date	Sep 6, 2017
Priority date	Sep 30, 2016
Publication date	Dec 14, 2021
Grant date	Dec 14, 2021

Abstract

A measurement circuitry (MC) for evaluating a resistance of a resistive gas sensor (GS) comprises a first current path (P 1 ), wherein a first logarithmic compression circuit (LC 1 ) is arranged in the first current path (P 1 ). A reference resistor (Rreference) and a second logarithmic compression circuit (LC 2 ) is arranged in a second current path (P 2 ) of the measurement circuitry (MC). A voltage generator (VG) provides a fixed voltage excitation for the resistive gas sensor (GS) and the reference resistor (Rreference). A first current (I 1 ) received from the resistive gas sensor (GS) flows from the gas sensor (GS) via the first current path (P 1 ) into the first logarithmic compression circuit (LC 1 ). An evaluation circuit (EC) determines the resistance (Rs) of the resistive gas sensor (GS) in dependence on a first and second output signal (Ve 1 , Ve 2 ) of the first and the second logarithmic compression circuit (LC 1 , LC 2 ).

First claim

The invention claimed is:

1. A measurement circuitry for evaluating a resistance of a resistive gas sensor, comprising:
an input terminal for connecting the measurement circuitry to the resistive gas sensor,
a reference resistor,
a first current path, the input terminal being arranged in the first current path,
a second current path, the reference resistor being arranged in the second current path,
a third current path,
a voltage generator to provide a fixed voltage excitation for the resistive gas sensor and the reference resistor,
a first logarithmic compression circuit being arranged in the first current path such that, in the case that the resistive gas sensor is connected to the input terminal, a first current received from the resistive gas sensor flows from the resistive gas sensor to the input terminal and via the first current path into the first logarithmic compression circuit,
a second logarithmic compression circuit being arranged in the second current path such that a second current flowing through the reference resistor flows into the second logarithmic compression circuit,
a first driver, the first driver being arranged in the first current path between the input terminal of the measurement circuitry and the first logarithmic compression circuit,
an evaluation circuit to determine the resistance of the resistive gas sensor,
wherein the first logarithmic compression circuit is configured to generate a first output signal in dependence on the first current,
wherein the second logarithmic compression circuit is configured to generate a second output signal in dependence on the second current,
wherein the evaluation circuit is configured to determine the resistance of the resistive gas sensor in dependence on the first and second output signal;
wherein the first logarithmic compression circuit is arranged in a common branch of the first current path and the third current path.

2. The measurement circuitry of claim 1 ,
wherein the evaluation circuit is configured to determine the resistance of the resistive gas sensor in dependence on a ratio of a thermal voltage of the measurement circuitry and the difference between the first output signal and the second output signal.

3. The measurement circuitry of claim 1 , comprising:
a first fixed voltage line to provide one of a supply potential and a ground potential,
an internal node being arranged in the second current path,
wherein the reference resistor is arranged between the first fixed voltage line and the internal node.

4. The measurement circuitry of claim 3 , comprising:
a first operational amplifier having a first input to apply an excitation voltage and a second input,
a second operational amplifier having a first input to apply the excitation voltage and a second input,
wherein the second input of the first operational amplifier is connected to the input terminal of the measurement circuitry,
wherein the second input of the second operational amplifier is connected to the internal node.

5. The measurement circuitry of claim 3 , comprising:
a second driver,
wherein the second driver is arranged in the second current path between the internal node of the measurement circuitry and the second logarithmic compression circuit,
wherein the first driver is controlled by the first operational amplifier and the second driver is controlled by the second operational amplifier.

6. The measurement circuitry of claim 3 , comprising:
a second fixed voltage line to provide one of the supply potential and the ground potential,
wherein the second fixed voltage line is configured to provide the ground potential, when the first fixed voltage line provides the supply potential, and to provide the supply potential, when the first fixed voltage line provides the ground potential,
wherein the second current path is arranged between the first and the second fixed voltage line,
wherein the first logarithmic compression circuit is arranged between the input terminal of the measurement circuitry and the second fixed voltage line,
wherein the second logarithmic compression circuit is arranged between the internal node of the measurement circuitry and the second fixed voltage line.

7. The measurement circuitry of claim 6 , comprising:
another reference resistor being arranged in the third current path,
wherein the third current path is arranged between the first and second fixed voltage line,
a third driver being arranged in the third current path between the other reference resistor and the first logarithmic compression circuit,
wherein the third driver is controlled by the first operational amplifier.

8. The measurement circuitry of claim 7 , comprising:
a first controllable switch being arranged between the input terminal of the measurement circuitry and the second input of the first operational amplifier,
a second controllable switch being arranged between the second input of the first operational amplifier and the third current path,
a third controllable switch being arranged between an output of the first operational amplifier and a control terminal of the first driver,
a fourth controllable switch being arranged between an output of the first operational amplifier and a control terminal of the third driver.

9. The measurement circuitry of claim 8 , comprising:
a control circuit to control the first and second and third and fourth controllable switch,
wherein the control circuit is configured to operate the first and the third controllable switch in a respective conductive state and to operate the second and the fourth controllable switch in a non-conductive state to perform a first measurement of the respective level of the first and the second output signal,
wherein the evaluation circuit is configured to calculate a first difference signal having a level in dependence on a difference between the respective level of the first output signal and the second output signal measured during the first measurement,
wherein the control circuit is configured to operate the second and the fourth controllable switch in a respective conductive state and to operate the first and third controllable switch in a non-conductive state to perform a second measurement of the respective level of the first and the second output signal,
wherein the evaluation circuit is configured to calculate a second difference signal having a level in dependence on a difference between the respective level of the first and second output signal measured during the second measurement,
wherein the evaluation circuit is configured to determine the resistance of the resistive gas sensor in dependence on the relationship between the first difference signal and the second difference signal.

10. The measurement circuitry of claim 6 , comprising
a third current path and a fourth current path being connected between the first and the second fixed voltage line,
a current mirror to provide a third current in the third current path and a fourth current in the fourth current path, the fourth current being N times larger than the third current,
a third logarithmic compression circuit to provide a third output signal, the third logarithmic compression circuit being arranged in the third current path,
a fourth logarithmic compression circuit to provide a fourth output signal, the fourth logarithmic compression circuit being arranged in the fourth current path.

11. The measurement circuitry of claim 10 ,
wherein the evaluation circuit is configured to calculate a first difference signal having a level in dependence on a difference between the respective level of the first and second output signal and to calculate a second difference sign

Assignees

• Ams Int Ag

Inventors

• Ranganathan Rohit
• Nyshadham Sanjeev Praphulla Chandra
• Avalur Krishna Kanth
• Adusumalli Ravi Kumar
• Ponnada Prasad

Classifications

• G01N27/122 Primary

  Circuits particularly adapted therefor, e.g. linearising circuits · CPC title